Serial Audio Interface (SAI)

Signal

Signal

State

during

Signal Description

Name

Type

Reset

SDI0

Input

Tri-

Serial Data Input 0—This is the receiver 0 serial data input.

stated

This signal is high impedance during hardware or software

reset, while receiver 0 is disabled (R0EN = 0), or while the chip

is in the Stop state. No external pull-up resistor is required.

SDI1

Input

Tri-

Serial Data Input 1—This is the receiver 1 serial data input.

stated

This signal is high impedance during hardware or software

reset, while receiver 1 is disabled (R1EN = 0), or while the chip

is in the Stop state. No external pull-up resistor is required.

SCKR

Input or

Tri-

Receive Serial Clock—SCKR is an output if the receiver

Output

stated

section is programmed as a master, and a Schmitt-trigger

input if programmed as a slave.

SCKR is high impedance if all receivers are disabled (personal

reset) and during hardware or software reset, or while the chip

is in the Stop state. No external pull-up is necessary.

WSR

Input or

Tri-

Receive Word Select—WSR is an output if the receiver section

Output

stated

is programmed as a master, and a Schmitt-trigger input if

programmed as a slave. WSR is used to synchronize the data

word and to select the left/right portion of the data sample.

WSR is high impedance if all receivers are disabled (personal

reset), during hardware reset, during software reset, or while

the chip is in the stop state. No external pull-up is necessary.

1-14

DSP56011/D

MOTOROLA