- •Advance Information
- •Y Data
- •Memory
- •Figure 1 DSP56011 Block Diagram
- •Table of Contents
- •Features
- •Digital Signal Processing Core
- •Memory
- •Program RAM
- •X data RAM
- •Y data RAM
- •Program ROM
- •X data ROM
- •Y data ROM
- •Peripheral and Support Circuits
- •Documentation
- •DSP56KFAMUM/AD
- •Signal/Connection Descriptions
- •Signal Groupings
- •Port B
- •Power
- •Ground
- •Phase Lock Loop (PLL)
- •Interrupt and Mode Control
- •Input
- •Input
- •Input (MODA)
- •Input
- •Input
- •Input (MODB)
- •Input (MODC)
- •Input
- •Host Interface (HI)
- •Input
- •Input
- •Input
- •Input
- •Serial Host Interface (SHI)
- •Serial Audio Interface (SAI)
- •SAI Receive Section
- •SAI Transmit Section
- •General Purpose Input/Output (GPIO)
- •Digital Audio Interface (DAX)
- •OnCE Port
- •Input
- •Output
- •Input
- •Output
- •Output
- •Input
- •Input
- •Specifications
- •Introduction
- •Maximum Ratings
- •TSTG
- •Thermal characteristics
- •DC Electrical Characteristics
- •VIHC
- •VIHR
- •VIHM
- •VILC
- •VILM
- •VILS
- •ITSI
- •ICCI
- •ICCW
- •ICCS
- •3. Periodically sampled and not 100% tested
- •AC Electrical Characteristics
- •Internal Clocks
- •ETHminimum
- •ETHmaximum
- •ETLminimum
- •ETLmaximum
- •ICYC
- •External Clock Operation
- •ICYC
- •Phase Lock Loop (PLL) Characteristics
- •RESET, Stop, Mode Select, and Interrupt Timing
- •VIHM
- •General Purpose I/O
- •Host Interface (HI) Timing
- •6. May decrease to 0 ns for future versions
- •Serial Audio Interface (SAI) Timing)
- •Master
- •Slave
- •Master
- •Slave
- •Master
- •Slave
- •Master
- •Slave
- •Master
- •Slave
- •Master
- •Slave
- •Master
- •Slave
- •Slave
- •Master
- •Slave1
- •Slave2
- •Master
- •Slave
- •Slave
- •Serial Host Interface (SHI) SPI Protocol Timing
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Bypassed
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Slave
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Slave
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Slave
- •Master
- •Master
- •Master
- •4. Periodically sampled, not 100% tested
- •Serial Host Interface (SHI) I2C Protocol Timing
- •TSCL
- •TBUF
- •TLOW
- •THIGH
- •Programming the Serial Clock
- •Bypassed
- •Narrow
- •Wide
- •Bypassed
- •Narrow
- •Wide
- •Bypassed
- •Narrow
- •Wide
- •Bypassed
- •Narrow
- •Wide
- •Bypassed
- •Narrow
- •Wide
- •TSCL
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •TBUF
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •TLOW
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •THIGH
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Bypassed
- •Narrow
- •Wide
- •Bypassed
- •Narrow
- •Wide
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Slave
- •Bypassed
- •Narrow
- •Wide
- •Master
- •Bypassed
- •Narrow
- •Wide
- •Master
- •General Purpose Input/Output (GPIO) Timing
- •Digital Audio Transmitter (DAX) Timing
- •2. Periodically sampled, not 100% tested
- •Note: High Impedance, external pull-down resistor
- •Packaging
- •Pin-out and Package Information
- •TQFP Package Description
- •not connected
- •MOSI/HA0
- •GPIO7
- •not connected
- •GPIO6
- •GNDA
- •GNDH
- •HREQ
- •GNDD
- •not connected
- •VCCH
- •GNDS
- •GPIO5
- •not connected
- •GPIO4
- •VCCD
- •not connected
- •GPIO3
- •GNDH
- •not connected
- •VCCS
- •GPIO2
- •not connected
- •SCKT
- •GNDD
- •VCCH
- •PLOCK
- •GPIO1
- •VCCQ
- •SCKR
- •GPIO0
- •GNDQ
- •GNDQ
- •GNDQ
- •PINIT
- •VCCQ
- •VCCQ
- •VCCQ
- •GNDP
- •GNDS
- •not connected
- •GNDQ
- •PCAP
- •not connected
- •HACK/PB14
- •VCCP
- •GNDA
- •GNDH
- •EXTAL
- •not connected
- •VCCA
- •GNDS
- •not connected
- •VCCH
- •MISO/SDA
- •DSCK/OS1
- •not connected
- •RESET
- •not connected
- •GNDA
- •not connected
- •not connected
- •GNDH
- •MODB/IRQB
- •not connected
- •not connected
- •MODC/NMI
- •not connected
- •not connected
- •VCCS
- •GPIO7
- •not connected
- •not connected
- •PCAP
- •not connected
- •PINIT
- •DSCK
- •not connected
- •PLOCK
- •not connected
- •RESET
- •not connected
- •EXTAL
- •not connected
- •SCKR
- •GNDA
- •not connected
- •SCKT
- •GNDA
- •not connected
- •GNDA
- •not connected
- •GNDD
- •not connected
- •GNDD
- •HACK
- •not connected
- •GNDH
- •not connected
- •GNDH
- •not connected
- •GNDH
- •not connected
- •GNDH
- •GNDP
- •HOREQ
- •VCCA
- •GNDQ
- •HREQ
- •GNDQ
- •VCCD
- •GNDQ
- •IRQA
- •VCCH
- •GNDQ
- •IRQB
- •VCCH
- •GNDS
- •MISO
- •VCCH
- •GNDS
- •MODA
- •VCCP
- •GNDS
- •MODB
- •VCCQ
- •GPIO0
- •MODC
- •VCCQ
- •GPIO1
- •MOSI
- •VCCQ
- •GPIO2
- •VCCQ
- •GPIO3
- •not connected
- •VCCS
- •GPIO4
- •not connected
- •VCCS
- •GPIO5
- •not connected
- •GPIO6
- •not connected
- •Ordering Drawings
- •Design Considerations
- •Thermal Design Considerations
- •Electrical Design Considerations
- •Power Consumption Considerations
- •Power-Up Considerations
- •Host Port Considerations
- •Host Programming Considerations
- •DSP Programming Considerations
- •Ordering Information
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by: DSP56011/D
DSP56011
Advance Information
24-BIT DVD DIGITAL SIGNAL PROCESSOR
The DSP56011 is a high-performance programmable Digital Signal Processor (DSP) developed for Digital Versatile Disc (DVD), High-Definition Television (HDTV), and Advanced Set-top audio decoding. The DSP56011 is optimized with audio-specific peripherals and customized memory configuration, and may be programmed with Motorola’s certified software for Dolby AC-3 5.1 Channel Surround, Dolby Pro Logic, and MPEG1 Layer 2. These applications use Motorola’s 24-bit DSP56000 architecture and are the highest quality solutions available. Flexible peripheral modules and interface software allow simple connection to a wide variety of video/ system decoders. In addition, the DSP56011 offers switchable memory space configuration, a large user-definable Program ROM and two independent data RAMs and ROMs, a Serial Audio Interface (SAI), Serial Host Interface (SHI), Parallel Host Interface (HI) with Direct Memory Access (DMA) for communicating with other processors, dedicated I/O lines, on-chip Phase Lock Loop (PLL), On-Chip Emulation (OnCE™) port, and on-chip Digital Audio Transmitter (DAX). Figure 1 shows the functional blocks of the DSP56011.
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15 |
8 |
9 |
5 |
2 |
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16-Bit Bus |
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24-Bit Bus |
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Parallel |
General |
Serial |
Serial |
Digital |
Program |
X Data |
Y Data |
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Host |
Purpose |
Audio |
Host |
Audio |
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Interface |
I/O |
Interface |
Interface |
Transmitter |
Memory |
Memory |
Memory |
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(HI) |
(GPIO) |
(SAI) |
(SHI) |
(DAX) |
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Expansion |
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Area |
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24-Bit |
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Address |
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PAB |
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XAB |
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DSP56000 |
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Generation |
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YAB |
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Core |
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Unit |
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Internal |
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GDB |
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PDB |
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Data |
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XDB |
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Bus |
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YDB |
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Switch |
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OnCETM Port |
Program |
Program |
Program |
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Data ALU |
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Clock |
Interrupt |
Decode |
Address |
24 × 24 + 56 → 56-Bit MAC |
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PLL |
Controller |
Controller |
Generator |
Two 56-Bit Accumulators |
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Gen. |
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Program Control Unit |
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3 |
4 |
4 |
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EXTAL |
IRQA, IRQB, NMI, RESET |
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AA1271 |
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Figure 1 DSP56011 Block Diagram |
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This document contains information on a new product. Specifications and information herein are subject to change without notice.
Preliminary Information
Rev. 1
© MOTOROLA, INC. 1996, 1997