Memory Configuration and Operating Modes

3.1.2.7 Saturation (SA)—Bit 4

The saturation (SA) bit enables automatic saturation on 32-bit arithmetic results, providing a user-enabled saturation mode for DSP algorithms that do not recognize or cannot take advantage of the extension accumulator. When the SA bit is set, automatic saturation occurs at the output of the MAC unit for basic arithmetic operations such as multiplication, addition, and so on. The saturation is performed by a special saturation circuit inside the MAC unit.

The saturation logic operates by checking 3 bits of the 36-bit result out of the MAC unit—exp[3], exp[0], and msp[15]. When the SA bit is set, these 3 bits determine if saturation is performed on the MAC unit’s output, and whether to saturate to the maximum positive or negative value as shown in Table 3-2. The SA bit is cleared by processor reset.

Table 3-2. MAC Unit Outputs with Saturation Mode Enabled (SA = 1)

NOTE:

Saturation mode is always disabled during the execution of the following instructions: ASLL, ASRR, LSLL, LSRR, ASRAC, LSRAC, MPYSU, MACSU, AND, OR, EOR, NOT, LSL, LSR, ROL, and ROR. For these instructions, no saturation is performed at the output of the MAC unit.

Care should be used when consulting the N, C, and E condition codes after an operation when the SA bit is set. These condition codes are computed based on the value of the result prior to saturation. Thus, they may not have the expected values.

3.1.2.8 External X Memory (EX)—Bit 3

The external X memory (EX) bit is necessary for providing a continuous memory map when using more than 64K of external data memory. When the EX bit is set, all accesses to X memory on the X address bus 1 (XAB1) and core global data bus (CGDB) or peripheral global data bus (PGDB) are forced to be external, except when a MOVE or bit-field instruction is executed using the I/O short addressing mode. In this case, the EX bit is ignored and the access is performed to the on-chip location. When the EX bit is cleared, internal X memory can be accessed with all addressing modes.

The EX bit is ignored by the second read of a dual read instruction, which uses the X address bus 2 (XAB2) and X data bus 2 (XDB2) and always accesses on-chip X data memory. For instructions with two parallel reads, the second read is always performed to internal on-chip memory. Refer to the DSP56800 Family Manual for a description of the dual read instructions.