OnCE™ Module

12.10.5.7 Displaying X Memory Area Starting at Address xxxx

For Example 12-2, the user should assume the multiple DSP configuration shown in Figure 12-25 on page 12-50. Before the procedure begins, all three DSPs are in user mode and their JTAG ports are executing the BYPASS instruction. The user wishes to display memory contents in DSP#2.

NOTE:

“Shift-IR,” “Shift-DR,” “Update-IR,” and “Update-DR” in the following example refer to operating states in the JTAG module. The TAP controller in the JTAG module uses the current operating state of the TAP controller combined with the level of the TMS input to transition between the operating states. A detailed description of the TAP controller state machine is presented in Section 13.3, “TAP Controller.”

BYPASS, DEBUG_REQUEST, and ENABLE_ONCE are JTAG instructions. (See Table 13-2 on page 13-5 for a list of JTAG instructions.)

Example 12-2. Display X Memory Area from Address xxxx—Serial

1.Perform steps 1–6 of the procedure in Example 12-1 on page 12-51; the register in this case is R0. Since R0 will be used in displaying the memory area, its original value should be saved and later restored just before the debug mode is left. OnCE state machine is in STATCOM state.

2.Enter Shift-DR, shift WRITE OPDBR with no GO and no EX (OnCE command = 00001001) into DSP#2 (9 clocks in Shift-DR). Pass through Update-DR. OnCE state machine is in WPDBR state.

3.Enter Shift-DR. Send the 16-bit opcode of the two-word DSP instruction: MOVE #$xxxx, R0 (17 clocks in Shift-DR). Pass through Update-DR to actually write the OPDBR. OnCE state machine is in STATCOM state.

4.Enter Shift-DR, shift WRITE OPDBR with GO and no EX (OnCE command = 01001001) into DSP#2 (9 clocks in Shift-DR). Pass through Update-DR. OnCE state machine is in WPDBR state.

5.Enter Shift-DR. Send the 16-bit data of the two-word DSP instruction: MOVE #$xxxx, R0 (the xxxx field). Pass through Update-DR to actually write the OPDBR and begin execution of the MOVE instruction. OnCE state machine is in STATCOM state to allow for polling.

6.Enter Shift-DR and begin polling for OS[1:0] = 11. While polling, shift in WRITE OPDBR with no GO and no EX (OnCE command = 00001001). When OS[1:0] = 11, indicating that the MOVE instruction has completed and the core has halted once again, R0 has been loaded with the base address of the memory area to be displayed. Pass through Update-DR. OnCE state machine is in WPDBR state.

7.Enter Shift-DR. Send the 16-bit opcode: MOVE X:(R0)+, x:OGDB (17 clocks in Shift-DR). Pass through Update-DR to actually write the OPDBR and begin execution of the MOVE instruction. OnCE state machine is in STATCOM state to allow for polling.

8.Enter Shift-DR and begin polling for OS[1:0] = 11. While polling, shift in READ OPDBR (OnCE command = 11001001). When OS[1:0] = 11, the MOVE instruction has completed, the core has halted once again, the contents of the first memory location have been placed in OGDBR, and R0 has been incremented such that it points to the next memory location. Pass through Update-DR. OnCE state machine is in RWREG state.