AA0119

Figure 9-2. JTAG Block Diagram

The serial interface supports communications with the host development or test system. It is implemented as a serial interface to occupy as few external pins on the device as possible. Consult the device’s user’s manual for a full description of the interface signals. All JTAG and OnCE commands and data are sent over this interface from the host system. The JTAG interface is also used by the OnCE port when it is active. In this mode, the JTAG acts as the OnCE port’s interface controller, and transparently passes all communications through to the OnCE port.

Commands sent to the JTAG module are decoded and processed by the command decoder. Commands for the JTAG port are completely independent from the DSP56800 instruction set, and are executed in parallel by the JTAG logic.

Registers in the JTAG module hold chip identification information and the information gathered by boundary scan operations. The ID register contains the industry-standard Motorola identification information, which is unique for each Motorola DSP. The boundary scan register holds a snapshot of the device’s pins when sampled by the JTAG port.

9.3 OnCE Port

The OnCE port provides emulation and debug capability directly on the chip, eliminating the need for expensive and complicated stand-alone in-circuit emulators (ICEs). The OnCE port permits full-speed, non-intrusive emulation on a user’s target system. This section describes the OnCE emulation environment for use in debugging real-time embedded applications.

The OnCE port has an associated interrupt vector in the DSP56800 interrupt vector table. The OnCE exception trap is available to the user so that when a debug event (breakpoint or trace occurrence) is detected, a level 1 non-maskable interrupt can be generated and the program can initiate the appropriate handler routine.