Software Techniques

Table 8-1. Operations Synthesized Using DSP56800 Instructions (Continued)

8.1.1 Jumps and Branches

Several operations for jumping and branching can be emulated, depending on selected bits in a bit field, overflows, or other condition codes.

8.1.1.1 JRSET and JRCLR Operations

The JRSET and JRCLR operations are very similar to the BRSET and BRCLR instructions. They still test a bit field and go to another address if all masked bits are either set or cleared. The BRSET and BRCLR instructions only allow branches of 64 locations away from the current instruction and can only test an 8-bit field; however, JRSET and JRCLR operations allow jumps to anywhere in the 64K-word program address space, and can specify a 16-bit mask. The following code shows that these two operations allow the same addressing modes as the BFTSTH and BFTSTL instructions.

Example 8-1. JRSET and JRCLR

;JRSET Operation

;Emulated in 5 Icyc (4 Icyc if false), 4 Instruction Words

;JRCLR Operation

;Emulated in 5 Icyc (4 Icyc if false), 4 Instruction Words

Useful Instruction Operations

8.1.1.2 BR1SET and BR1CLR Operations

The BR1SET and BR1CLR operations are very similar to the BRSET and BRCLR instructions. They still test a bit field and branch to another address based on the result of some test. The difference is that for BRSET and BRCLR the condition is true if all selected bits in the bit field are 1s or 0s, respectively, whereas for BR1SET and BR1CLR the condition is true if at least one of the selected bits in the bit field is a 1 or 0, respectively. BR1SET and BR1CLR operations can also specify a 16-bit mask, compared to an 8-bit mask for BRSET and BRCLR. The following code shows that these two operations allow the same addressing modes as the BFTSTH and BFTSTL instructions.

Example 8-2. BR1SET and BR1CLR

;BR1SET Operation

;Emulated in 5 Icyc (4 Icyc if false), 3 Instruction Words

;BR1CLR Operation

;Emulated in 5 Icyc (4 Icyc if false), 3 Instruction Words

8.1.1.3 JR1SET and JR1CLR Operations

The JR1SET and JR1CLR operations are very similar to the JRSET and JRCLR instructions. They still test a bit field and jump to another address based on the result of some test. The difference is that for JRSET and JRCLR the condition is true if all selected bits in the bit field are 1s or 0s, respectively, whereas for JR1SET and JR1CLR the condition is true if at least one of the selected bits in the bit field is a 1 or 0, respectively. JR1SET and JR1CLR operations allow jumps to anywhere in the 64K-word program address space, and can specify a 16-bit mask. The following code shows that these two operations allow the same addressing modes as the BFTSTH and BFTSTL instructions.

Example 8-3. JR1SET and JR1CLR

;JR1SET Operation

;Emulated in 5 Icyc (4 Icyc if false), 4 Instruction Words

;JR1CLR Operation

;Emulated in 5 Icyc (4 Icyc if false), 4 Instruction Words