Software Stack Operation

5.1.9.7 Nested Looping Bit (NL)—Bit 15

The nested looping (NL) bit (OMR bit 15) is used to display the status of program DO looping and the hardware stack. If this bit is set, then the program is currently in a nested DO loop (that is, two DO loops are active). If this bit is cleared, then there may be a single or no DO loop active. This bit is necessary for saving and restoring the contents of the hardware stack, which is described further in Section 8.13, “Multitasking and the Hardware Stack,” on page 8-34. REP looping does not affect this bit.

It is important that the user never put the processor in the illegal combination specified in Table 5-5. This can be avoided by ensuring that the LF bit is never cleared when the NL bit is set.

The NL bit is cleared on processor reset. Also see Section 5.1.8.11, “Loop Flag (LF)—Bit 15,” which discusses the LF bit in the SR.

Table 5-5. Looping Status

If both the NL and LF bits are set (that is, two DO loops are active) and a DO instruction is executed, a hardware-stack-overflow interrupt occurs because there is no more space on the hardware stack to support a third DO loop.

The NL bit is also affected by any accesses to the hardware stack register. Any MOVE instruction that writes this register copies the old contents of the LF bit into the NL bit and then sets the LF bit. Any reads of this register, such as from a MOVE or TSTW instruction, copy the NL bit into the LF bit and then clear the NL bit.

5.1.9.8 Reserved OMR Bits—Bits 2, 7 and 9–14

The OMR bits 2, 7, and 9–14 are reserved. They will read as zero during DSP read operations and should be written as zero to ensure future compatibility.

5.2 Software Stack Operation

The software stack is a last-in-first-out (LIFO) stack of arbitrary depth implemented using memory locations in the X data memory. It is accessed through the POP instruction and the PUSH instruction macro (see Section 8.5, “Multiple Value Pushes,” on page 8-19) and will read or write the location in the X data memory pointed to by the stack pointer (SP) register. The PUSH instruction macro (two instruction cycles) pre-increments the SP register, and the POP instruction (one instruction cycle) will post-decrement the SP register.

The program counter and the SR are pushed on this stack for subroutine calls and interrupts. These registers are pulled from the stack for returns from subroutines using the RTS instruction (which restores only the program extension bits in SR), and for returns from interrupt service routines that use the RTI instruction (the entire SR is restored from the stack).