Добавил:
Upload Опубликованный материал нарушает ваши авторские права? Сообщите нам.
Вуз: Предмет: Файл:
Скачиваний:
46
Добавлен:
27.04.2015
Размер:
4.26 Mб
Скачать

 

 

 

 

 

 

Architecture and Programming Model

 

 

15

13 12

0

 

 

 

Register LC

 

 

 

 

 

 

 

 

 

No Bits Present

 

LC

 

Register LC

 

Used as a Source

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LSB of

 

 

 

 

 

 

 

 

 

Word

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

13 12

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Zero Extension

 

Contents

 

CGDB Bus Contents

 

 

 

 

of LC

 

of LC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reading the Loop Count Register

 

 

 

15

13 12

0

 

 

 

 

 

 

 

 

 

 

CGDB Bus Contents

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LSB of

 

 

 

 

 

 

 

Not Used

 

Word

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

13 12

0

 

 

 

Register LC Used

 

 

 

 

 

 

 

 

 

No Bits Present

 

LC

 

Register LC

 

as a Destination

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Writing the Loop Count Register

AA0010

Figure 5-3. Accessing the Loop Count Register (LC)

This register is not stacked by a DO instruction and not unstacked by end-of-loop processing, as is done on other Motorola DSPs. Section 5.3, “Program Looping,” discusses what occurs when the loop count is zero. See Section 8.6.4, “Nested Loops,” on page 8-22 for a discussion of nesting loops in software.

The upper three bits of this register will read as zero during DSP read operations and should be written as zero to ensure future compatibility.

5.1.6 Loop Address

The loop address (LA) register indicates the location of the last instruction word in a hardware program loop (DO loop only). When the instruction word at the address contained in this register is fetched, the LC is checked. If it is not equal to one, the LC is decremented, and the next instruction is taken from the address at the top of the system stack; otherwise the PC is incremented, the LF is restored with the value in the OMR’s NL bit, one location from the Hardware Stack is purged, and instruction execution continues with the instruction immediately after the loop.

The LA register is a read/write register written into by the DO instruction. The LA register can be directly accessed by the MOVE instructions as well. This also allows for saving and restoring the LA to and from the stack during the nesting of loops. This register is not stacked by a DO instruction and is not unstacked by end-of-loop processing. See Section 8.6.4, “Nested Loops,” on page 8-22 for a discussion of nesting loops in software.

 

Program Controller

5-5

Соседние файлы в папке DSP568xx