Addressing Modes

4.2.2.6 Index by Short Displacement: (SP-xx), (R2+xx)

This addressing mode contains the 6-bit short immediate index within the instruction word. This field is always one-extended to form a negative offset when the SP register is used and is always zero-extended to form a positive offset when the R2 register is used. The type of arithmetic used to add the short displacement to R2 or SP is always linear; modulo arithmetic is not allowed. This addressing mode requires an extra instruction cycle. This reference is classified as an X memory reference. See Figure 4-8.

Indexed by Short Displacement Example: MOVE A1,X:(R2+3)

Short Immediate Value from the Instruction Word

Assembler syntax: X:(Rn+xx), X:(SP-xx) Additional instruction execution cycles: 1

Additional effective address program words: 0

AA0021

Figure 4-8. Address Register Indirect: Indexed by Short Displacement

Address Generation Unit

4.2.2.7 Index by Long Displacement: (Rn+xxxx), (SP+xxxx)

This addressing mode contains the 16-bit long immediate index within the instruction word. This second word is treated as a signed two’s-complement value. The type of arithmetic (linear or modulo) used to add the long displacement to Rn is determined by M01 for R0 and R1 and is always linear for R2, R3, and SP. This addressing mode requires two extra instruction cycles. This addressing mode is available for MOVEC instructions. This reference is classified as an X memory reference. See Figure 4-9.

Indexed by Long Displacement Example: MOVE A1,X:(R0+$10CF)

Long Immediate Value from the Instruction Word

Assembler syntax: X:(Rn+xxxx), X:(SP+xxxx) Additional instruction execution cycles: 2 Additional effective address program words: 1

AA0022

Figure 4-9. Address Register Indirect: Indexed by Long Displacement