Data Arithmetic Logic Unit

3.3.7 Unsigned Arithmetic

Unsigned arithmetic can be performed on the DSP56800 architecture. The addition, subtraction, and compare instructions work for both signed and unsigned values, but the condition code computation is different. Likewise, there is a difference for unsigned multiplication.

3.3.7.1 Conditional Branch Instructions for Unsigned Operations

Unsigned arithmetic is supported on operations such as addition, subtraction, comparison, and logical operations using the same ADD, SUB, CMP, and other instructions used for signed computations. The operations are performed the same for both representations. The difference lies both in which status bits are used in comparing signed and unsigned numbers and in how the data is interpreted, for which see Section 3.3.2, “Data Formats.”

Four additional Bcc instruction variants are provided for branching based on the comparison of two unsigned numbers. These variants are:

•HS (High or same)—unsigned greater than or equal to

•LS (Low or same)—unsigned less than or equal to

•HI (High)—unsigned greater than

•LO (Low)—unsigned less than

The variants used for comparing unsigned numbers, HS, LS, HI, and LO, are used in place of GE, LE, GT, and LT respectively, which are used for comparing signed numbers. Note that the HS condition is exactly the same as the carry clear (CC), and that LO is exactly the same as carry set (CS).

Unsigned comparisons are enabled when the CC bit in the OMR register is set. When this bit is set, the value in the extension register is ignored when generating the C, V, N, and Z condition codes, and the condition codes are set using only the 32 LSBs of the result. Typically, this mode is very useful for controller and compiled code.

NOTE:

The unsigned branch condition variants (HS, LS, HI, and LO) may only be used when the CC bit is set in the program controller’s OMR register. If this bit is not set, then these condition codes should not be used.

In cases where it is necessary to maintain all 36 bits of the result and the extension register is required, any unsigned numbers must first be converted to signed when loaded into the accumulator using the technique in Section 8.1.6, “Unsigned Load of an Accumulator,” on page 8-7. In these cases, the extension register will contain the correct value, and since values are now signed, it is possible to use the signed branch conditions: GE, LE, GT, or LT. Typically, this mode is more useful for DSP code.

3.3.7.2 Unsigned Multiplication

Unsigned multiplications are supported with the MACSU and MPYSU instructions. If only one operand is unsigned, then these instructions can be used directly. If both operands are unsigned, an unsigned-times-unsigned multiplication is performed using the technique demonstrated in Example 3-11 on page 3-23.