TUSB3210

Universal Serial Bus

General-Purpose Device Controller

www.ti.com

SLLS466D –FEBRUARY 2001 –REVISED AUGUST 2004

2 Functional Description

2.1MCU Memory Map

Figure 2-1 illustrates the MCU memory map under boot and normal operation. It must be noted that the internal 256 bytes of IDATA are not shown because it is assumed to be in the standard 8052 location (0000 to 00FF). The shaded areas represent the internal ROM/RAM.

When the SDW bit = 0 (boot mode): The 6K ROM is mapped to address 0000–17FF and is duplicated in location 8000–97FF in code space. The internal 8K RAM is mapped to address range 0000–1FFF in data space. Buffers, MMR and I/O are mapped to address range (FD80–FFFF) in data space.

When the SDW bit = 1 (normal mode): The 6K ROM is mapped to 8000–97FF in code space. The internal 8K RAM is mapped to address range 0000–1FFF in code space. Buffers, MMR, and I/O are mapped to address range FD80–FFFF in data space.

8000

97FF

FF80

MMR MMR

FFFF

Figure 2-1. MCU Memory Map (TUSB3210)

12 Functional Description