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component should have as good a periodic ACF as possible and among binary components minimax ones (see Sections 6.7 and 6.9) are best. At the first step an uncertainty in L1 possible phases of the ‘fastest’ component is resolved after a parallel correlating of the received signal with nc local references, being the differences of L1 1 cyclic replicas of the first component with the L1th one. If among nc correlations some are non-negative, the reference providing maximal correlation determines the phase, which is declared as synchronized with the first component of the received signal. Otherwise the L1th cyclic replica is believed to be true. After this the chip bounds of the second component are known and the next step is fulfilled, repeating the same operations as the previous with the second component, etc. The procedure terminates after the nth step, where uncertainty on the phase of the slowest component is resolved in the same way as before. As is seen, each step in this case realizes testing of L1 ¼ nc þ 1 hypotheses and reduces L1 times the initial uncertainty region M ¼ L ¼ Ln1. Again, the sequences just described are best fit to this L1-alternative testing: for every receiver complexity (number of parallel correlators nc) the unique code exists minimizing acquisition time. Due to this, such codes deserve to be called matched [70]. Stiffler’s rapid acquisition sequence is one of them, corresponding to a single correlator receiver.
A numerical evaluation shows that the gain in acquisition time accompanying the use of these codes may range far beyond hundreds of times [70, 86] (see also Problem 8.14).
An ordinary sum of binary components is a multilevel rather than a binary sequence, which entails signal amplitude modulation and is often considered objectionable. Clipping the sum and retaining only its sign transforms a matched code into binary, preserving the search procedure unchanged. The only penalty for this is a slight (within 1.5–2 times) reduction in the acquisition time gain.
Note that the two-stage synchronization code of UMTS (see Section 11.4.11) is an example of a similar approach: at the first stage the primary code is found whose period is 15 times smaller than that of the secondary one. Then the second search stage removes the uncertainty on which of M ¼ 15 phases of the secondary code is true.
8.4 Code tracking
8.4.1 Delay estimation by tracking
Closed tracking loops are used universally in wireless receivers to instrument continuous and accurate parameter measuring. Depending on the nature of a measured parameter, examples are automatic frequency control, phase-lock loop, automatic gain control, and others. A strict mathematical investigation proving the optimality of tracking loops for the case of time-varying signal parameters is based on the theory of nonlinear estimation [88], but their primary idea follows directly from the ML rule studied in Chapter 2. The specific character of a spread spectrum receiver manifests itself chiefly in a despreading operation (see Section 7.1), appealing to a precise synchronism of a local despreading reference with the arriving signal. Keeping this in mind, we concentrate here on the precise measurement of delay (or code phase) of the arriving signal.
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To get the point most quickly let us simplify the problem up to estimating the delay of a baseband signal, removing the effects of random phase. Suppose that is an unknown delay of a baseband signal s(t). Then on the strength of the ML rule (2.55) the optimal estimator should form estimation ^ of this parameter as its value maximizing the correlation z( ) between the reference signal replica s(t ) and observation y(t). One way to implement this is a correlator bank (as in Figure 2.18) directly computing the function z( ) at M sample points; the other is a matched filter structure reproducing z( ) in real time (Figure 2.19, the envelope detector being unnecessary for a baseband signal). But both schemes may appear infeasible for the case of a spread spectrum signal of a long length: the first due to the necessity for numerous correlators and the second due to a problematic matched filter implementation (see Example 8.1.1).
The tracking loop structure is one more alternative. Note that at the maximum point of z( ) its derivative vanishes:
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Let us call e(^) ¼ z0(^) the error signal, the reasons for which will be clear soon. As is seen, one may search for ^ as an argument making the error signal zero. Assume that the genuine signal delay is and a tentative estimate is ^, and calculate the mean of the error signal over all noise realizations in y(t):
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eð^Þ ¼ z0ð^Þ ¼ yðtÞs0ðt ^Þdt ¼ sðt Þs0ðt ^Þdt ¼ s0ðt Þsðt ^Þdt
0 0 0
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The last equality here follows after integration by parts, whenever care is taken that the integration interval spans the whole signal ‘body’ regardless of : s( ) ¼ s(T ) ¼ 0. Under the same condition the average error signal at ^ ¼ (tentative estimate coincides with a true parameter value) is zero:
eð^ ¼ Þ ¼ ZT sðt Þs0ðt Þdt ¼ ½s0ðt Þ&2 T ¼ 0 2
but the derivative of e(^) at the same point according to the last part of (8.21):
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is minus energy of the signal derivative, i.e. negative. This means that if ^ lies in a sufficiently small vicinity to the left of , e(^) is positive, while with ^ > e(^) is negative. This suggests the structure of a delay-lock loop (DLL) solving equation (8.20) by way of iterations and shown in Figure 8.5. The local reference generator creates a time-shifted replica of the signal
Signal acquisition and tracking |
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s′(t – τ)
Reference generator
Figure 8.5 General DLL structure
derivative s0(t ^), which is correlated in the correlator with the observation y(t). The resulting error signal is then cleared off the noise by a loop filter to approximate averaging in (8.21). When the smoothed error signal is positive it tells with a high probability that the local reference s0(t ^) is ahead of the signal, and forces the voltage controlled oscillator (VCO) to lower its frequency, i.e. increase the reference (tentative) delay ^. On the other hand, a negative smoothed error signal drives VCO1 to the higher frequency, i.e. reduces reference delay. Clearly, in the steady state DLL maintains the error signal around zero, securing synchronism between the local reference and the arriving signal.
Obviously, to operate adequately the DLL needs an initial targeting, i.e. a starting value of ^, which is close enough to a genuine signal delay. On the one hand, this imposes demands on the precision of the acquisition procedure. On the other hand, the reference waveform following from the ML rule is usually not feasible (e.g. it may include delta functions when the signal consists of rectangular chips). Typically some other waveform replaces it, which, being more convenient to implement, preserves the main property: a distinct odd dependence of error signal at the correlator output on estimation error ^ . In constructing such a reference the desire to provide pull-in (capturing synchronism) with softer requirements for the initial targeting may play an influential role. We will have more comments on this in Section 8.4.3.
8.4.2 Early–late DLL discriminators
The first element of the DLL structure is a discriminator, i.e. correlator–reference combination forming an error signal e(^). In one of the classical schemes of DLL discriminator for a baseband signal s(t), the reference sr(t) is the difference of two time-offset replicas of the signal: the late s(t /2) and early s(t þ /2) ones, being their time separation. Then a useful component of the error signal due to mismatch " ¼ ^ of reference versus the received signal is:
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1 In a real implementation input quantity controlling the oscillator frequency may be not a voltage, e.g. in a digitally realized loop input number plays this role. However, to avoid unnecessary multiplicity of terms we use the traditional term VCO as universal.
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where E is the energy of a standard signal s(t) over integration time T, A is the amplitude of the received signal scaling it versus s(t), and ( ) is the normalized signal ACF calculated over the time space [0, T]. Take, for instance, a discrete periodic signal (spread spectrum code) of length N with chips of duration D, and let integration time span integer number l of periods: T ¼ lND, then ( ) is periodic ACF. If s(t) is a minimax binary sequence (e.g. m-sequence, Legendre sequence) with rectangular chips, then its normalized periodic ACF ( ) looks as is shown in Figure 8.6a. The advancing and retarding (with minus) copies of ( ) entering (8.22) are shown in Figure 8.6b by the dashed lines for an example separation ¼ 2D and their difference e(") ¼ e(^ ¼ þ "), called the discriminator curve, is given in the same plot by the solid line. It is readily seen that the discriminator under consideration is fully adequate: advancing or lagging of the reference versus an input signal causes positive or negative error signal, respectively, enabling the VCO to change its frequency and move the reference in the proper direction.
Figure 8.7 presents one possible structure of an early–late discriminator for the case of a baseband code. The code generator clocked by VCO forms the early signal replica s(t þ /2), which delayed by gives a late replica. Their difference enters the correlator as a reference signal. The code replica s(t) synchronized with the input signal and used for despreading may be obtained as delayed by the /2 early replica. If the code generator is a shift-register-based one and ¼ 2D no external delays are necessary, since all three code replicas may be read from three successive register flip-flops.
An alternative scheme of the same discriminator involves two correlators first separately correlating the observation with early and late signal replicas and subtracting the results to come to an error signal e(^) [18,77].
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Figure 8.6 Discriminator curve of the early–late DLL
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Figure 8.7 Early–late discriminator for a baseband signal
In the case of a bandpass signal the discriminator just considered may be applicable only if the receiver phase recovery loop is previously synchronized with the incoming signal carrier, so that a bandpass signal may be transformed into its real baseband equivalent. For this reason it is often called coherent, as is the DLL employing it. If preliminary phase synchronization is not possible, a noncoherent discriminator is used based on comparison of squared moduli of two correlations. These are calculated between the observed complex envelope Y_ (t) and the complex envelopes of two references, being early and late replicas of the signal code. Above all, this discriminator proves to be efficient despite the presence of data modulation. Technically it is often implemented as shown in Figure 8.8, where multiplication of complex envelopes is performed through heterodyning (see the comment at the end of Section 7.1.2). Let us inspect how this structure works, ignoring input noise and setting, with no generality violation, ¼ 0. Let the references be time-offset replicas of the spreading signal having complex envelope S_(t) and carrier frequency f1, which differs from the received one f0:
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where an initial phase # will finally play no role. The incoming signal complex envelope AB_ (t)S_(t) exp (j ) includes along with the spreading code also signal amplitude A, data
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Figure 8.8 Early–late noncoherent discriminator
