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Санкт-Петербургский государственный университет аэрокосмического приборостроения

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ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter	Rating

Supply Voltage	±18 V
Internal Power Dissipation	See Figure 3
Input Voltage (Common Mode)	±120 V1
Differential Input Voltage	±120 V1
Output Short-Circuit Duration	Indefinite
Storage Temperature	−65°C to +125°C
Operating Temperature Range	–40°C to +85°C
Lead Temperature (Soldering, 10 sec)	300°C

1 When using ±12 V supplies or higher (see the Input Voltage Range section).

AD628

Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL CHARACTERISTICS
	1.6
	1.4							TJ = 150°C
	1.4
(W)	1.2
(W)					8-LEAD MSOP PACKAGE
DISSIPATION	1.0				8-LEAD MSOP PACKAGE
DISSIPATION

POWER	0.8	8-LEAD SOIC PACKAGE
POWER	0.6
	0.6
	0.4
	0.2	MSOP θJA (JEDEC; 4-LAYER BOARD) = 132.54°C/W
		SOIC θJA (JEDEC; 4-LAYER BOARD) = 154°C/W
	0									-003
	–60	–40	–20	0	20	40	60	80	100	-003
	–60	–40	–20	0	20	40	60	80	100	02992-C
			AMBIENT TEMPERATURE (°C)							02992-C

Figure 3. Maximum Power Dissipation vs. Temperature

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. F | Page 7 of 20

AD628

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Table 4. Pin Function Descriptions

Pin No.	Mnemonic

1	+IN
2	−VS
3	VREF
4	CFILT
5	OUT
6	RG
7	+VS
8	−IN

	+IN				–IN
		1		8
–VS		2	AD628		+VS
				7
V		3	TOP VIEW		R
	REF		(Not to Scale)	6		02992-C-004
					G
CFILT		4			OUT
				5

Figure 4. Pin Configuration

Descriptions

Noninverting Input

Negative Supply Voltage

Reference Voltage Input

Filter Capacitor Connection

Amplifier Output

Output Amplifier Inverting Input

Positive Supply Voltage

Inverting Input

Rev. F | Page 8 of 20

TYPICAL PERFORMANCE CHARACTERISTICS

	40
	8440 UNITS
	35
	30
UNITS	25
UNITS	20
% OF	15
	15
	10
	5
	0
	–1.6	–1.2	–0.8	–0.4	0	0.4	0.8	1.2	1.6	2.0
				INPUT OFFSET VOLTAGE (mV)						02992-005C-

Figure 5. Typical Distribution of Input Offset Voltage,

VS = ±15 V, SOIC_N Package

8440 UNITS

	20
% OF UNITS	15
% OF UNITS	10
	5
	0	–78	–82	–86	–90	–94	–98	–102	–106	–110
	–74	–78	–82	–86	–90	–94	–98	–102	–106	–110
					CMRR (dB)					02992-006C-

Figure 6. Typical Distribution of Common-Mode Rejection, SOIC_N Package

	130
	130
	120
	120
	110
	110
	100
	100
(dB)	90			VS = ±15V
(dB)
CMRR	80
	80
	70
	70
	60					VS = ±2.5V


	50
	50
	40
	40
	30
	30
	10	100			1k		10k	100k
			FREQUENCY (Hz)						02992-007C-

Figure 7. CMRR vs. Frequency

AD628

	140
	G = +0.1
	120
	100
(dB)	80
	80
PSRR	–15V	+15V
PSRR	60
		+2.5V
	40
	20
	0

0.1		1	10	100		1k		10k		100k		1M	02992-C008-
				FREQUENCY (Hz)									02992-C008-
		Figure 8. PSRR vs. Frequency, Single and Dual Supplies
1000
1000
VOLTAGE NOISE DENSITY (nV/√Hz)








100													-C-009
100
1			10	100			1k		10k		100k
					FREQUENCY (Hz)								02992
	Figure 9. Voltage Noise Spectral Density, RTI, VS = ±15 V
1000
1000
VOLTAGE NOISE DENSITY (nV/√Hz)








100													-C-010
100
1			10	100			1k		10k		100k
					FREQUENCY (Hz)								02992

Figure 10. Voltage Noise Spectral Density, RTI, VS = ±2.5 V

Rev. F | Page 9 of 20

AD628

100

(5μV/DIV)

NOISE

		0		5		10
			TIME (Sec)			02992-011C-
		Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI
	60
	50
	40	G = +100
	40
	30
(dB)	20	G = +10
	20
	10
GAIN	10
GAIN	0	G = +1
	0
	–10
	–20	G = +0.1
	–20
	–30
	–40
	100	1k	10k	100k	1M	10M
			FREQUENCY (Hz)			02992-012C-

		Figure 12. Small Signal Frequency Response,
		VOUT = 200 mV p-p, G = +0.1, +1, +10, and +100
	60
	50
	40	G = +100
	40
	30
(dB)	20	G = +10
	20
	10
GAIN	10
GAIN	0	G = +1
	0
	–10
	–20	G = +0.1
	–20
	–30
	–40
	10	100	1k	10k	100k	1M
			FREQUENCY (Hz)			02992-013C-

Figure 13. Large Signal Frequency Response,

VOUT = 20 V p-p, G = +0.1, +1, +10, and +100

	40
		9638 UNITS
	35
DEVICES	30
DEVICES	20
	25
% OF	15
	10
	5
	0	1	2	3	4	5	6	7	8	9	10
	0	1	2	3	4	5	6	7	8	9	10
					GAIN ERROR (ppm)						02992-014C-
		Figure 14. Typical Distribution of +1 Gain Error
	150
								UPPER CMV LIMIT
(V)	100
(V)				–40°C
VOLTAGE				–40°C
VOLTAGE	50			+85°C
	50
MODE-	0	+25°C							VREF = 0V
MODE-
COMMON
COMMON	–50				–40°C
	–50				–40°C
	–100		+85°C					LOWER CMV LIMIT
	–100

	–150					VS (±V)					015-C-02992
	0			5		10			15		20

Figure 15. Common-Mode Operating Range vs.

Power Supply Voltage for Three Temperatures

500μV	VS = ±15V
100	RL = 1kΩ
90
(μV)
OUTPUTERROR	RL = 10kΩ
	RL = 2kΩ
10
0

4.0V

OUTPUT VOLTAGE (V)

02992-C-016

Figure 16. Normalized Gain Error vs. VOUT, VS = ±15 V

Rev. F | Page 10 of 20

AD628

100μV	VS = ±2.5V
100	RL = 1kΩ
100
90
(μV)	RL = 10kΩ
OUTPUTERROR	RL = 10kΩ
	RL = 2kΩ
10
0

500mV

OUTPUT VOLTAGE (V)

Figure 17. Normalized Gain Error vs. VOUT, VS = ±2.5 V

	4
	3
(nA)
CURRENTBIAS	2
	2

–40	–20	0	20	40	60	80	100
			TEMPERATURE (°C)

Figure 18. Bias Current vs. Temperature Buffer

	15			–40°C
				–40°C
(V)	10				–25°C
(V)			+85°C
SWING	5			+25°C
SWING
VOLTAGE	0
VOLTAGE						–40°C
OUTPUT	–5				–25°C
OUTPUT	–10			+85°C	+25°C
	–10
	–15	5	10	15	20	25
	0	5	10	15	20	25
			OUTPUT CURRENT (mA)

Figure 19. Output Voltage Operating Range vs. Output Current

02992-C-017

02992-C-018

02992-C-019

500mV
100
90
10
0		C-02992-020
50mV	4μs	C-02992-020
50mV	4μs
Figure 20. Small Signal Pulse Response,
RL = 2 kΩ, CL = 0 pF, Top: Input, Bottom: Output
500mV
100
90
10
0		C-02992-021
50mV	4μs	C-02992-021
50mV	4μs
Figure 21. Small Signal Pulse Response,
RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output
500mV
100
90
10
0
50mV	4μs	C-021
		02992-

Figure 22. Large Signal Pulse Response,

RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output

Rev. F | Page 11 of 20

AD628

100

10mV

100μs

Figure 23. Settling Time to 0.01%, 0 V to 10 V Step

02992-C-023

100

10mV

100μs

02992-C-024

Figure 24. Settling Time to 0.01% 0 V to −10 V Step

Rev. F | Page 12 of 20

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ABSOLUTE MAXIMUM RATINGS

THERMAL CHARACTERISTICS

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS