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Cadence Tutorial - Layout

Example: CMOS Inverter Layout The P-Select Layer

As with the NMOS transistor, the p-type doping (implantation) window over the active area must be defined using the n-pelect layer.

1. Select pselect layer from the LSW

2. Draw a rectangle that extends over the active area by 0.6u (2 lambda) in all directions.

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Last Updated by Ilhan Hatirnaz on 11/7/1998