- •Features
- •Disclaimer
- •Overview
- •Block Diagram
- •Pin Descriptions
- •Port B (PB7..PB0)
- •Port C (PC7..PC0)
- •Port D (PD7..PD0)
- •D-/SDATA
- •UGND
- •UVCC
- •UCAP
- •RESET/PC1/dW
- •XTAL1
- •XTAL2/PC0
- •AVR CPU Core
- •Introduction
- •Status Register
- •Stack Pointer
- •TABLE 1.
- •TABLE 2.
- •AVR AT90USB82/162 Memories
- •I/O Memory
- •Clock Systems and their Distribution
- •Clock Switch
- •Exemple of use
- •Swith from external clock to RC clock
- •Switch from RC clock to external clock
- •Clock Sources
- •Default Clock Source
- •External Clock
- •Internal PLL for USB interface
- •Idle Mode
- •Power-down Mode
- •Power-save Mode
- •Standby Mode
- •Analog Comparator
- •Brown-out Detector
- •Watchdog Timer
- •Port Pins
- •Resetting the AVR
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Watchdog Reset
- •USB Reset
- •Watchdog Timer
- •TABLE 2.
- •TABLE 2.
- •Interrupts
- •TABLE 2.
- •Introduction
- •Configuring the Pin
- •Toggling the Pin
- •Reading the Pin Value
- •TABLE 3.
- •Unconnected Pins
- •Alternate Port Functions
- •Register Description for I/O-Ports
- •Timer/Counter0 and Timer/Counter1 Prescalers
- •Internal Clock Source
- •Prescaler Reset
- •External Clock Source
- •8-bit Timer/Counter0 with PWM
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Normal Mode
- •Fast PWM Mode
- •8-bit Timer/Counter Register Description
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Input Capture Unit
- •Noise Canceler
- •Force Output Compare
- •Normal Mode
- •Fast PWM Mode
- •16-bit Timer/Counter Register Description
- •TABLE 2.
- •TABLE 2.
- •Slave Mode
- •Master Mode
- •Data Modes
- •USART
- •Overview
- •Clock Generation
- •External Clock
- •Frame Formats
- •Parity Bit Calculation
- •TABLE 2.
- •TABLE 3.
- •TABLE 4.
- •Parity Generator
- •TABLE 3.
- •TABLE 2.
- •Receiver Error Flags
- •Parity Checker
- •Disabling the Receiver
- •TABLE 2.
- •Using MPCMn
- •Receiver Flow Control
- •Overview
- •Clock Generation
- •Frame Formats
- •TABLE 2.
- •Data Transfer
- •TABLE 3.
- •USB controller
- •Features
- •Block Diagram
- •Typical Application Implementation
- •Device mode
- •Bus Powered device
- •Introduction
- •Interrupts
- •Power modes
- •Idle mode
- •Power down
- •Freeze clock
- •Memory access capability
- •Memory management
- •PAD suspend
- •D+/D- Read/write
- •Registers description
- •USB general registers
- •USB Software Operating modes
- •USB Device Operating modes
- •Introduction
- •Power-on and reset
- •Endpoint reset
- •USB reset
- •Endpoint selection
- •Endpoint activation
- •Address Setup
- •Detach
- •Remote Wake-up
- •STALL request
- •Special consideration for Control Endpoints
- •STALL handshake and Retry mechanism
- •CONTROL endpoint management
- •Control Write
- •Control Read
- •Overview
- •“Manual” mode
- •Detailed description
- •IN endpoint management
- •“Manual” mode
- •Detailed description
- •Abort
- •Isochronous mode
- •Underflow
- •CRC Error
- •Overflow
- •Interrupts
- •Registers
- •USB device general registers
- •USB device endpoint registers
- •Characteristics
- •Analog Comparator
- •Application Section
- •Boot Reset Fuse
- •Simple Assembly Code Example for a Boot Loader
- •debugWIRE On-chip Debug System
- •Features
- •Overview
- •Physical Interface
- •Software Break Points
- •Limitations of debugWIRE
- •debugWIRE Related Register in I/O Memory
- •Fuse Bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Signal Names
- •Chip Erase
- •Reading the Flash
- •Reading the EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •DC Characteristics
- •External Clock Drive Waveforms
- •External Clock Drive
- •Maximum speed vs. VCC
- •Supply Current of IO modules
- •Example 1
- •Example 2
- •Example 3
- •Instruction Set Summary
- •Packaging Information
- •TQFP32
Simple Assembly Code Example for a Boot Loader
228
;-the routine writes one page of data from RAM to Flash
;the first data location in RAM is pointed to by the Y pointer
;the first data location in Flash is pointed to by the Z-pointer ;-error handling is not included
;-the routine must be placed inside the Boot space
;(at least the Do_spm sub routine). Only code inside NRWW section can
;be read during Self-Programming (Page Erase and Page Write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
;loophi (r25), spmcrval (r20)
;storing and restoring of registers is not included in the routine
;register usage can be optimized at the expense of code size
;-It |
is assumed that either the interrupt table is moved to the Boot |
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; loader section or that the interrupts are disabled. |
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.equ PAGESIZEB = PAGESIZE*2 |
;PAGESIZEB is page size in BYTES, not words |
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.org SMALLBOOTSTART |
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Write_page: |
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; Page Erase |
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ldi |
spmcrval, (1<<PGERS) | (1<<SPMEN) |
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call |
Do_spm |
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; re-enable the RWW section |
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ldi |
spmcrval, (1<<RWWSRE) | (1<<SPMEN) |
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call |
Do_spm |
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; transfer data from RAM to Flash page buffer |
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ldi |
looplo, low(PAGESIZEB) |
;init loop variable |
ldi |
loophi, high(PAGESIZEB) |
;not required for PAGESIZEB<=256 |
Wrloop: |
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ld |
r0, Y+ |
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ld |
r1, Y+ |
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ldi |
spmcrval, (1<<SPMEN) |
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call |
Do_spm |
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adiw |
ZH:ZL, 2 |
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sbiw |
loophi:looplo, 2 |
;use subi for PAGESIZEB<=256 |
brne |
Wrloop |
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; execute Page Write |
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subi |
ZL, low(PAGESIZEB) |
;restore pointer |
sbci |
ZH, high(PAGESIZEB) |
;not required for PAGESIZEB<=256 |
ldi |
spmcrval, (1<<PGWRT) | (1<<SPMEN) |
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call |
Do_spm |
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; re-enable the RWW section |
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ldi |
spmcrval, (1<<RWWSRE) | (1<<SPMEN) |
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call |
Do_spm |
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; read back and check, optional |
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ldi |
looplo, low(PAGESIZEB) |
;init loop variable |
ldi |
loophi, high(PAGESIZEB) |
;not required for PAGESIZEB<=256 |
subi |
YL, low(PAGESIZEB) |
;restore pointer |
sbci |
YH, high(PAGESIZEB) |
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Rdloop: |
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elpm |
r0, Z+ |
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ld |
r1, Y+ |
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cpse |
r0, r1 |
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jmp |
Error |
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sbiw |
loophi:looplo, 1 |
;use subi for PAGESIZEB<=256 |
brne |
Rdloop |
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7707A–AVR–01/07
; return to RWW section
; verify that RWW section is safe to read
Return: |
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in |
temp1, SPMCSR |
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sbrs |
temp1, RWWSB |
; If RWWSB is set, the RWW section is not ready yet |
ret |
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; re-enable the RWW section |
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ldi |
spmcrval, (1<<RWWSRE) | (1<<SPMEN) |
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call |
Do_spm |
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rjmp |
Return |
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Do_spm:
;check for previous SPM complete Wait_spm:
in temp1, SPMCSR sbrc temp1, SPMEN rjmp Wait_spm
;input: spmcrval determines SPM action
;disable interrupts if enabled, store status in temp2, SREG
cli
;check that no EEPROM write access is present Wait_ee:
sbic EECR, EEPE rjmp Wait_ee
;SPM timed sequence
out SPMCSR, spmcrval spm
; restore SREG (to enable interrupts if originally enabled) out SREG, temp2
ret
AT90USB82/162 Boot |
In Table 29 through Table 31, the parameters used in the description of the Self-Programming |
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Loader Parameters |
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are given. |
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Table 29. Boot Size Configuration() (16k) |
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DEVICE |
BOOTSZ1 |
BOOTSZ0 |
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Boot Size (in bytes) |
Pages |
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Application Flash Section |
(byte address) |
Boot Loader Flash Section (byte address) |
End Application Section |
Boot Reset Address (Start Boot Loader Section) |
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1 |
1 |
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512 bytes |
4 |
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0x0000 |
- 0x3DFF |
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0x3E00 - 0x3FFF |
0x3DFF |
0x3E00 |
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16Kb |
1 |
0 |
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1024 bytes |
8 |
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0x0000 |
- 0x3BFF |
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0x3C00 - 0x3FFF |
0x3BFF |
0x3C00 |
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0 |
1 |
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2048 bytes |
16 |
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0x0000 |
- 0x37FF |
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0x3800 - 0x3FFF |
0x37FF |
0x3800 |
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0 |
0 |
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4096 bytes |
32 |
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0x0000 |
- 0x2FFF |
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0x3000 - 0x3FFF |
0x2FFF |
0x3000 |
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1 |
1 |
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512 bytes |
4 |
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0x0000 |
- 0x1DFF |
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0x1E00 - 0x1FFF |
0x1DFF |
0x1E00 |
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8Kb |
1 |
0 |
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1024 bytes |
8 |
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0x0000 |
- 0x1BFF |
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0x1C00 - 0x1FFF |
0x1BFF |
0x1C00 |
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0 |
1 |
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2048 bytes |
16 |
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0x0000 |
- 0x17FF |
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0x1800 - 0x1FFF |
0x17FF |
0x1800 |
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0 |
0 |
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4096 bytes |
32 |
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0x0000 |
- 0x0FFF |
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0x1000 - 0x1FFF |
0x0FFF |
0x1000 |
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229
7707A–AVR–01/07
(Page size = 64 words = 128 bytes)
The different BOOTSZ Fuse configurations are shown in Figure 92.
Table 30. Read-While-Write Limit(1)
Device |
Section |
Pages |
Address |
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16K |
Read-While-Write section (RWW) |
96 |
0x0000 - 0x2FFF |
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No Read-While-Write section (NRWW) |
32 |
0x3000 - 0x3FFF |
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8K |
Read-While-Write section (RWW) |
32 |
0x0000 - 0x0FFF |
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No Read-While-Write section (NRWW) |
32 |
0x1000 - 0x1FFF |
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Note: 1. For details about these two section, see “NRWW – No Read-While-Write Section” on page 218 and “RWW – Read-While-Write Section” on page 218.
Table 31.
Explanation of different variables used in Figure 94 and the mapping to the Z-pointer
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Corresponding |
Description(1) |
Variable |
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Z-value |
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PCMSB |
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12 |
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Most significant bit in the Program Counter. |
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(The Program Counter is 13 bits PC[12:0]) |
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PAGEMSB |
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5 |
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Most significant bit which is used to address |
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the words within one page (64 words in a |
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page requires six bits PC [5:0]). |
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ZPCMSB |
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Z13 |
Bit in Z-pointer that is mapped to PCMSB. |
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Because Z0 is not used, the ZPCMSB |
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equals PCMSB + 1. |
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ZPAGEMSB |
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Z6 |
Bit in Z-pointer that is mapped to PCMSB. |
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Because Z0 is not used, the ZPAGEMSB |
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equals PAGEMSB + 1. |
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PCPAGE |
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PC[12:6] |
Z13:Z7 |
Program Counter page address: Page |
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select, for Page Erase and Page Write |
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PCWORD |
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PC[5:0] |
Z6:Z1 |
Program Counter word address: Word |
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select, for filling temporary buffer (must be |
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zero during Page Write operation) |
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Note: 1. |
Z0: should be zero for all SPM commands, byte select for the (E)LPM instruction. |
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See “Addressing the Flash During Self-Programming” on page 223 for details about the use of Z-pointer during Self-Programming.
230
7707A–AVR–01/07
