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AVR / datasheets / AT90USB82_162.pdf
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PS/2

Characteristics The PS/2 pad IO’s characteristics are:

support 5.5V (min: 4.5V, max: 5.5V)

open drain type

Output voltage level threshold, MCU driving low thru a 1kΩ pull-up: VOLmax = 0,7V

fall time with 1kΩ pull-up and 500pF load: 250ns < Tfall < 1µs

internal 2.2kΩ to 10kΩ pull-up at Vcc (5V), controlled by firmware.

High impedance output when disabled.

Figure 88. USB pad and PS/2 pad multiplexing

PS/2 Pad

D+ / SCK

D- / SDATA

USB Pad

Bit

7

6

5

4

3

2

1

0

 

 

-

-

-

-

-

-

-

PS2EN

PS2CON

 

 

 

 

 

 

 

 

 

 

Read/Write

R

R

R

R

R

R

R

R/W

Initial Value

0

0

0

0

0

0

0

0

 

• Bit 7:1 – Reserved bits

Do not set these bits.

• Bit 0 – PS2EN : PS/2 Pad Enable

Set this bit to “1” to enable the PS/2 pad.

Set this bit to “0” to disable the PS/2 pad.

For more information about pad driving, see “USB/PS2 Software Output Enable register – UPOE” on page 190.

The UPOE register described in this section allows to read or writes values on the pad. PS/2 protocol must be entirely handled by software.

213

7707A–AVR–01/07

Figure 89. PS/2 Pad description

 

 

 

Vcc

 

note: pull-up between 2.2k and 10k

Z

4.7kΩ

Z

4.7kΩ

 

 

 

SDATA

 

 

 

SCK

Table 19. PS/2 DC parameters

Symbol

Parameter

Condition

Min.

Typ.

Max.

 

 

 

 

 

 

UVCC

PS/2 power supply

 

4.0V

4.5V

5.5V

 

 

 

 

 

 

VIL

Input Low Voltage

UVCC = 4.5V - 5.5V

 

 

0.7V

VIH

Input High Voltage

UVCC = 4.5V - 5.5V

2.4V

 

 

RIH

Pull-up resistor

UVCC = 4.5V - 5.5V

4.4kΩ

5.1kΩ

6.5kΩ

Table 20. PS/2 AC parameters

Symbol

Parameter

Condition

Min.

Typ.

Max.

 

 

 

 

 

 

 

 

UVCC = 4.5V - 5.5V

 

 

 

Tfall_output

Fall time

10% - 90%

330ns

375ns

450ns

 

 

Rload = 1kΩ, Cload = 500pF

 

 

 

Tspike

Spike width filtering

 

 

 

60ns

214

7707A–AVR–01/07

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