
- •1. Pin Configurations
- •1.1 Disclaimer
- •2. Overview
- •2.1 Block Diagram
- •2.2 Pin Descriptions
- •2.2.3 Port B (PB3...PB0)
- •2.2.4 RESET
- •2.2.5 Port A (PA7...PA0)
- •3. Resources
- •4. About Code Examples
- •5. CPU Core
- •5.1 Overview
- •5.2 Architectural Overview
- •5.4 Status Register
- •5.5 General Purpose Register File
- •5.6 Stack Pointer
- •5.7 Instruction Execution Timing
- •5.8 Reset and Interrupt Handling
- •5.8.1 Interrupt Response Time
- •6. Memories
- •6.2 SRAM Data Memory
- •6.2.1 Data Memory Access Times
- •6.3 EEPROM Data Memory
- •6.3.1 EEPROM Read/Write Access
- •6.3.2 Atomic Byte Programming
- •6.3.3 Split Byte Programming
- •6.3.4 Erase
- •6.3.5 Write
- •6.3.6 Preventing EEPROM Corruption
- •6.4 I/O Memory
- •6.4.1 General Purpose I/O Registers
- •6.5 Register Description
- •7. System Clock and Clock Options
- •7.1 Clock Systems and their Distribution
- •7.2 Clock Sources
- •7.3 Default Clock Source
- •7.4 Crystal Oscillator
- •7.6 Calibrated Internal RC Oscillator
- •7.7 External Clock
- •7.8 128 kHz Internal Oscillator
- •7.9 System Clock Prescaler
- •7.9.1 Switching Time
- •7.10 Register Description
- •8. Power Management and Sleep Modes
- •8.1 Sleep Modes
- •8.2 Idle Mode
- •8.3 ADC Noise Reduction Mode
- •8.5 Standby Mode
- •8.6 Power Reduction Register
- •8.7 Minimizing Power Consumption
- •8.7.1 Analog to Digital Converter
- •8.7.2 Analog Comparator
- •8.7.4 Internal Voltage Reference
- •8.7.5 Watchdog Timer
- •8.7.6 Port Pins
- •8.8 Register Description
- •9. System Control and Reset
- •9.0.1 Resetting the AVR
- •9.0.2 Reset Sources
- •9.0.3 Power-on Reset
- •9.0.4 External Reset
- •9.0.6 Watchdog Reset
- •9.1 Internal Voltage Reference
- •9.2 Watchdog Timer
- •9.3 Timed Sequences for Changing the Configuration of the Watchdog Timer
- •9.3.1 Safety Level 1
- •9.3.2 Safety Level 2
- •9.4 Register Description
- •10. Interrupts
- •10.1 Interrupt Vectors
- •11. External Interrupts
- •11.1 Pin Change Interrupt Timing
- •11.2 Register Description
- •12. I/O Ports
- •12.1 Overview
- •12.2 Ports as General Digital I/O
- •12.2.1 Configuring the Pin
- •12.2.2 Toggling the Pin
- •12.2.3 Switching Between Input and Output
- •12.2.4 Reading the Pin Value
- •12.2.5 Digital Input Enable and Sleep Modes
- •12.2.6 Unconnected Pins
- •12.3 Alternate Port Functions
- •12.3.1 Alternate Functions of Port A
- •12.3.2 Alternate Functions of Port B
- •12.4 Register Description
- •13. 8-bit Timer/Counter0 with PWM
- •13.1 Features
- •13.2 Overview
- •13.2.1 Registers
- •13.2.2 Definitions
- •13.3 Timer/Counter Clock Sources
- •13.4 Counter Unit
- •13.5 Output Compare Unit
- •13.5.1 Force Output Compare
- •13.5.2 Compare Match Blocking by TCNT0 Write
- •13.5.3 Using the Output Compare Unit
- •13.6 Compare Match Output Unit
- •13.6.1 Compare Output Mode and Waveform Generation
- •13.7 Modes of Operation
- •13.7.1 Normal Mode
- •13.7.2 Clear Timer on Compare Match (CTC) Mode
- •13.7.3 Fast PWM Mode
- •13.7.4 Phase Correct PWM Mode
- •13.8 Timer/Counter Timing Diagrams
- •13.9 Register Description
- •14. 16-bit Timer/Counter1
- •14.1 Features
- •14.2 Overview
- •14.2.1 Registers
- •14.2.2 Definitions
- •14.2.3 Compatibility
- •14.3.1 Reusing the Temporary High Byte Register
- •14.4 Timer/Counter Clock Sources
- •14.5 Counter Unit
- •14.6 Input Capture Unit
- •14.6.1 Input Capture Trigger Source
- •14.6.2 Noise Canceler
- •14.6.3 Using the Input Capture Unit
- •14.7 Output Compare Units
- •14.7.1 Force Output Compare
- •14.7.2 Compare Match Blocking by TCNT1 Write
- •14.7.3 Using the Output Compare Unit
- •14.8 Compare Match Output Unit
- •14.8.1 Compare Output Mode and Waveform Generation
- •14.9 Modes of Operation
- •14.9.1 Normal Mode
- •14.9.2 Clear Timer on Compare Match (CTC) Mode
- •14.9.3 Fast PWM Mode
- •14.9.4 Phase Correct PWM Mode
- •14.9.5 Phase and Frequency Correct PWM Mode
- •14.10 Timer/Counter Timing Diagrams
- •14.11 Register Description
- •15. Timer/Counter Prescaler
- •15.0.1 Prescaler Reset
- •15.0.2 External Clock Source
- •15.1 Register Description
- •16.1 Features
- •16.2 Overview
- •16.3 Functional Descriptions
- •16.3.2 SPI Master Operation Example
- •16.3.3 SPI Slave Operation Example
- •16.3.5 Start Condition Detector
- •16.3.6 Clock speed considerations
- •16.4 Alternative USI Usage
- •16.4.4 Edge Triggered External Interrupt
- •16.4.5 Software Interrupt
- •16.5 Register Descriptions
- •17. Analog Comparator
- •17.1 Analog Comparator Multiplexed Input
- •17.2 Register Description
- •18. Analog to Digital Converter
- •18.1 Features
- •18.2 Overview
- •18.3 ADC Operation
- •18.4 Starting a Conversion
- •18.5 Prescaling and Conversion Timing
- •18.6 Changing Channel or Reference Selection
- •18.6.1 ADC Input Channels
- •18.6.2 ADC Voltage Reference
- •18.7 ADC Noise Canceler
- •18.7.1 Analog Input Circuitry
- •18.7.2 Analog Noise Canceling Techniques
- •18.7.3 ADC Accuracy Definitions
- •18.8 ADC Conversion Result
- •18.8.1 Single Ended Conversion
- •18.8.2 Unipolar Differential Conversion
- •18.8.3 Bipolar Differential Conversion
- •18.9 Temperature Measurement
- •18.10 Register Description
- •18.10.3.1 ADLAR = 0
- •18.10.3.2 ADLAR = 1
- •19. debugWIRE On-chip Debug System
- •19.1 Features
- •19.2 Overview
- •19.3 Physical Interface
- •19.4 Software Break Points
- •19.5 Limitations of debugWIRE
- •19.6 Register Description
- •20. Self-Programming the Flash
- •20.0.1 Performing Page Erase by SPM
- •20.0.2 Filling the Temporary Buffer (Page Loading)
- •20.0.3 Performing a Page Write
- •20.1.1 EEPROM Write Prevents Writing to SPMCSR
- •20.1.2 Reading the Fuse and Lock Bits from Software
- •20.1.3 Preventing Flash Corruption
- •20.1.4 Programming Time for Flash when Using SPM
- •20.2 Register Description
- •21. Memory Programming
- •21.1 Program And Data Memory Lock Bits
- •21.2 Fuse Bytes
- •21.2.1 Latching of Fuses
- •21.3 Signature Bytes
- •21.4 Calibration Byte
- •21.5 Page Size
- •21.6 Serial Downloading
- •21.6.1 Serial Programming Algorithm
- •21.6.2 Serial Programming Instruction set
- •21.7 High-voltage Serial Programming
- •21.8.2 Considerations for Efficient Programming
- •21.8.3 Chip Erase
- •21.8.4 Programming the Flash
- •21.8.5 Programming the EEPROM
- •21.8.6 Reading the Flash
- •21.8.7 Reading the EEPROM
- •21.8.8 Programming and Reading the Fuse and Lock Bits
- •21.8.9 Reading the Signature Bytes and Calibration Byte
- •22. Electrical Characteristics
- •22.1 Absolute Maximum Ratings*
- •22.2 Speed Grades
- •22.3 Clock Characterizations
- •22.3.1 Calibrated Internal RC Oscillator Accuracy
- •22.3.2 External Clock Drive Waveforms
- •22.3.3 External Clock Drive
- •22.4 System and Reset Characterizations
- •22.6 Serial Programming Characteristics
- •22.7 High-voltage Serial Programming Characteristics
- •23.1 Active Supply Current
- •23.2 Idle Supply Current
- •23.3 Supply Current of IO modules
- •23.3.0.1 Example 1
- •23.5 Standby Supply Current
- •23.7 Pin Driver Strength
- •23.8 Pin Threshold and Hysteresis
- •23.9 BOD Threshold and Analog Comparator Offset
- •23.10 Internal Oscillator Speed
- •23.11 Current Consumption of Peripheral Units
- •23.12 Current Consumption in Reset and Reset Pulsewidth
- •24. Register Summary
- •25. Instruction Set Summary
- •26. Ordering Information
- •26.1 ATtiny24
- •26.2 ATtiny44
- •26.3 ATtiny84
- •27. Packaging Information
- •28. Errata
- •28.1 ATtiny24
- •28.2 ATtiny44
- •28.3 ATtiny84
- •29. Datasheet Revision History

29. Datasheet Revision History
29.1Rev E. 09/06
1.All characterization data is moved to ”Electrical Characteristics” on page 180.
2.All Register Descriptions are gathered up in separate sections in the end of each chapter.
3.Updated ”System Control and Reset” on page 40.
4.Updated Table 13-3 on page 85, Table 13-6 on page 86, Table 13-8 on page 87, Table 14-2 on page 114 and Table 14-4 on page 116.
5.Updated ”Fast PWM Mode” on page 105.
6.Updated Figure 14-7 on page 106 and Figure 18-1 on page 140.
7.Updated ”Analog Comparator Multiplexed Input” on page 135.
8.Added note in Table 21-11 on page 171.
9.Updated ”Electrical Characteristics” on page 180.
10.Updated ”Typical Characteristics – Preliminary Data” on page 188.
29.2Rev D. 08/06
1.Updated ”Calibrated Internal RC Oscillator” on page 30.
2.Updated ”Oscillator Calibration Register – OSCCAL” on page 33.
3.Added Table 22-1 on page 182.
4.Updated code examples in ”SPI Master Operation Example” on page 126.
5.Updated code examples in ”SPI Slave Operation Example” on page 127.
6.Updated ”Signature Bytes” on page 167.
29.3Rev C. 07/06
1.Updated Features in ”USI – Universal Serial Interface” on page 123.
2.Added ”Clock speed considerations” on page 130.
3.Updated Bit description in ”ADMUX – ADC Multiplexer Selection Register” on page 151.
4.Added note to Table 20-1 on page 163.
29.4Rev B. 05/06
1.Updated ”Default Clock Source” on page 27
2.Updated ”Power Reduction Register” on page 36.
3.Updated Table 22-3 on page 183, Table 9-4 on page 42, Table 18-3 on page 151, Table 21-5 on page 167, Table 21-11 on page 171, Table 21-15 on page 177, Table 22-6 on page 185.
4.Updated Features in ”Analog to Digital Converter” on page 139.
226 ATtiny24/44/84
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ATtiny24/44/84
5.Updated Operation in ”Analog to Digital Converter” on page 139.
6.Updated ”Temperature Measurement” on page 150.
7.Updated DC Characteristics in ”Electrical Characteristics” on page 180.
8.Updated ”Typical Characteristics – Preliminary Data” on page 188.
9.Updated ”Errata” on page 223.
29.5Rev A. 12/05
Initial revision.
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ATtiny24/44/84
Table Of Contents
1 |
Pin Configurations ................................................................................... |
2 |
|
|
1.1 |
Disclaimer ................................................................................................................ |
2 |
2 |
Overview ................................................................................................... |
3 |
|
|
2.1 |
Block Diagram ......................................................................................................... |
3 |
|
2.2 |
Pin Descriptions ...................................................................................................... |
5 |
3 |
Resources ................................................................................................. |
6 |
|
4 |
About Code Examples ............................................................................. |
7 |
|
5 |
CPU Core .................................................................................................. |
8 |
|
|
5.1 |
Overview ................................................................................................................. |
8 |
|
5.2 |
Architectural Overview ............................................................................................ |
8 |
|
5.3 |
ALU – Arithmetic Logic Unit .................................................................................... |
9 |
|
5.4 |
Status Register ........................................................................................................ |
9 |
|
5.5 |
General Purpose Register File .............................................................................. |
11 |
|
5.6 |
Stack Pointer ......................................................................................................... |
12 |
|
5.7 |
Instruction Execution Timing ................................................................................. |
13 |
|
5.8 |
Reset and Interrupt Handling ................................................................................ |
13 |
6 |
Memories ................................................................................................ |
16 |
|
|
6.1 |
In-System Re-programmable Flash Program Memory .......................................... |
16 |
|
6.2 |
SRAM Data Memory ............................................................................................. |
16 |
|
6.3 |
EEPROM Data Memory ........................................................................................ |
18 |
|
6.4 |
I/O Memory ............................................................................................................ |
22 |
|
6.5 |
Register Description .............................................................................................. |
23 |
7 |
System Clock and Clock Options ......................................................... |
26 |
|
|
7.1 |
Clock Systems and their Distribution ..................................................................... |
26 |
|
7.2 |
Clock Sources ....................................................................................................... |
27 |
|
7.3 |
Default Clock Source ............................................................................................. |
27 |
|
7.4 |
Crystal Oscillator ................................................................................................... |
27 |
|
7.5 |
Low-frequency Crystal Oscillator ........................................................................... |
29 |
|
7.6 |
Calibrated Internal RC Oscillator ........................................................................... |
30 |
|
7.7 |
External Clock ....................................................................................................... |
30 |
|
7.8 |
128 kHz Internal Oscillator .................................................................................... |
32 |
|
7.9 |
System Clock Prescaler ........................................................................................ |
32 |
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8006E–AVR–09/06

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............................................................................................7.10 Register Description |
33 |
8 Power Management and Sleep Modes ................................................. |
35 |
|
8.1 |
Sleep Modes ......................................................................................................... |
35 |
8.2 |
Idle Mode ............................................................................................................... |
35 |
8.3 |
ADC Noise Reduction Mode ................................................................................. |
36 |
8.4 |
Power-down Mode ................................................................................................ |
36 |
8.5 |
Standby Mode ....................................................................................................... |
36 |
8.6 |
Power Reduction Register ..................................................................................... |
36 |
8.7 |
Minimizing Power Consumption ............................................................................ |
37 |
8.8 |
Register Description .............................................................................................. |
38 |
9 System Control and Reset .................................................................... |
40 |
|
9.1 |
Internal Voltage Reference .................................................................................... |
44 |
9.2 |
Watchdog Timer .................................................................................................... |
44 |
9.3 |
Timed Sequences for Changing the Configuration of the Watchdog Timer .......... |
45 |
9.4 |
Register Description .............................................................................................. |
46 |
10 |
Interrupts ................................................................................................ |
50 |
|
|
10.1 |
Interrupt Vectors .................................................................................................. |
50 |
11 |
External Interrupts ................................................................................. |
52 |
|
|
11.1 |
Pin Change Interrupt Timing ............................................................................... |
52 |
|
11.2 |
Register Description ............................................................................................ |
53 |
12 |
I/O Ports .................................................................................................. |
56 |
|
|
12.1 |
Overview ............................................................................................................. |
56 |
|
12.2 |
Ports as General Digital I/O ................................................................................. |
57 |
|
12.3 |
Alternate Port Functions ...................................................................................... |
61 |
|
12.4 |
Register Description ............................................................................................ |
72 |
13 |
8-bit Timer/Counter0 with PWM ............................................................ |
74 |
|
|
13.1 |
Features .............................................................................................................. |
74 |
|
13.2 |
Overview ............................................................................................................. |
74 |
|
13.3 |
Timer/Counter Clock Sources ............................................................................. |
75 |
|
13.4 |
Counter Unit ........................................................................................................ |
75 |
|
13.5 |
Output Compare Unit .......................................................................................... |
76 |
|
13.6 |
Compare Match Output Unit ................................................................................ |
78 |
|
13.7 |
Modes of Operation ............................................................................................. |
79 |
|
13.8 |
Timer/Counter Timing Diagrams ......................................................................... |
83 |
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ATtiny24/44/84 |
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|
|
13.9 |
Register Description ............................................................................................ |
85 |
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|
|||
14 |
16-bit Timer/Counter1 ............................................................................ |
92 |
||
|
|
14.1 |
Features .............................................................................................................. |
92 |
|
|
14.2 |
Overview ............................................................................................................. |
92 |
|
|
14.3 |
Accessing 16-bit Registers .................................................................................. |
95 |
|
|
14.4 |
Timer/Counter Clock Sources ............................................................................. |
97 |
|
|
14.5 |
Counter Unit ........................................................................................................ |
98 |
|
|
14.6 |
Input Capture Unit ............................................................................................... |
99 |
|
|
14.7 |
Output Compare Units ....................................................................................... |
101 |
|
|
14.8 |
Compare Match Output Unit .............................................................................. |
103 |
|
|
14.9 |
Modes of Operation ........................................................................................... |
104 |
|
|
14.10 Timer/Counter Timing Diagrams ..................................................................... |
111 |
|
|
|
14.11 |
Register Description ........................................................................................ |
114 |
15 |
Timer/Counter Prescaler ..................................................................... |
121 |
||
|
|
15.1 |
Register Description .......................................................................................... |
122 |
|
16 USI – Universal Serial Interface .......................................................... |
123 |
||
|
|
16.1 |
Features ............................................................................................................ |
123 |
|
|
16.2 |
Overview ........................................................................................................... |
123 |
|
|
16.3 |
Functional Descriptions ..................................................................................... |
124 |
|
|
16.4 |
Alternative USI Usage ....................................................................................... |
130 |
|
|
16.5 |
Register Descriptions ........................................................................................ |
131 |
17 |
Analog Comparator ............................................................................. |
135 |
||
|
|
17.1 |
Analog Comparator Multiplexed Input ............................................................... |
135 |
|
|
17.2 |
Register Description .......................................................................................... |
137 |
|
18 Analog to Digital Converter ................................................................ |
139 |
||
|
|
18.1 |
Features ............................................................................................................ |
139 |
|
|
18.2 |
Overview ........................................................................................................... |
139 |
|
|
18.3 |
ADC Operation .................................................................................................. |
140 |
|
|
18.4 |
Starting a Conversion ........................................................................................ |
141 |
|
|
18.5 |
Prescaling and Conversion Timing .................................................................... |
142 |
|
|
18.6 |
Changing Channel or Reference Selection ....................................................... |
145 |
|
|
18.7 |
ADC Noise Canceler ......................................................................................... |
146 |
|
|
18.8 |
ADC Conversion Result .................................................................................... |
149 |
|
|
18.9 |
Temperature Measurement ............................................................................... |
150 |
iii
8006E–AVR–09/06

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........................................................................................18.10 Register Description |
151 |
19 debugWIRE On-chip Debug System .................................................. |
158 |
|
19.1 |
Features ............................................................................................................ |
158 |
19.2 |
Overview ........................................................................................................... |
158 |
19.3 |
Physical Interface .............................................................................................. |
158 |
19.4 |
Software Break Points ....................................................................................... |
159 |
19.5 |
Limitations of debugWIRE ................................................................................. |
159 |
19.6 |
Register Description .......................................................................................... |
159 |
20 |
Self-Programming the Flash ............................................................... |
160 |
|
|
20.1 |
Addressing the Flash During Self-Programming ............................................... |
161 |
|
20.2 |
Register Description .......................................................................................... |
163 |
21 |
Memory Programming ......................................................................... |
165 |
|
|
21.1 |
Program And Data Memory Lock Bits ............................................................... |
165 |
|
21.2 |
Fuse Bytes ........................................................................................................ |
166 |
|
21.3 |
Signature Bytes ................................................................................................. |
167 |
|
21.4 |
Calibration Byte ................................................................................................. |
167 |
|
21.5 |
Page Size .......................................................................................................... |
168 |
|
21.6 |
Serial Downloading ........................................................................................... |
169 |
|
21.7 |
High-voltage Serial Programming ...................................................................... |
173 |
|
21.8 |
High-voltage Serial Programming Algorithm ..................................................... |
174 |
22 |
Electrical Characteristics .................................................................... |
180 |
|
|
22.1 |
Absolute Maximum Ratings* ............................................................................. |
180 |
|
22.2 |
Speed Grades ................................................................................................... |
181 |
|
22.3 |
Clock Characterizations .................................................................................... |
182 |
|
22.4 |
System and Reset Characterizations ................................................................ |
183 |
|
22.5 |
ADC Characteristics – Preliminary Data ............................................................ |
184 |
|
22.6 |
Serial Programming Characteristics .................................................................. |
186 |
|
22.7 |
High-voltage Serial Programming Characteristics ............................................. |
187 |
23 Typical Characteristics – Preliminary Data ....................................... |
188 |
||
|
23.1 |
Active Supply Current ........................................................................................ |
188 |
|
23.2 |
Idle Supply Current ............................................................................................ |
191 |
|
23.3 |
Supply Current of IO modules ........................................................................... |
194 |
|
23.4 |
Power-down Supply Current ............................................................................. |
195 |
|
23.5 |
Standby Supply Current .................................................................................... |
196 |
iv ATtiny24/44/84
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ATtiny24/44/84
|
23.6 |
Pin Pull-up ......................................................................................................... |
196 |
|
23.7 |
Pin Driver Strength ............................................................................................ |
199 |
|
23.8 |
Pin Threshold and Hysteresis ........................................................................... |
201 |
|
23.9 |
BOD Threshold and Analog Comparator Offset ................................................ |
204 |
|
23.10 |
Internal Oscillator Speed ................................................................................. |
206 |
|
23.11 |
Current Consumption of Peripheral Units ........................................................ |
208 |
|
23.12 Current Consumption in Reset and Reset Pulsewidth .................................... |
211 |
|
24 |
Register Summary ............................................................................... |
213 |
|
25 |
Instruction Set Summary .................................................................... |
215 |
|
26 |
Ordering Information ........................................................................... |
217 |
|
|
26.1 |
ATtiny24 ............................................................................................................ |
217 |
|
26.2 |
ATtiny44 ............................................................................................................ |
218 |
|
26.3 |
ATtiny84 ............................................................................................................ |
219 |
27 |
Packaging Information ........................................................................ |
220 |
|
|
27.1 |
20M1 ................................................................................................................. |
220 |
|
27.2 |
14P3 .................................................................................................................. |
221 |
|
27.3 |
14S1 .................................................................................................................. |
222 |
28 |
Errata |
..................................................................................................... |
223 |
|
28.1 |
ATtiny24 ............................................................................................................ |
223 |
|
28.2 |
ATtiny44 ............................................................................................................ |
224 |
|
28.3 |
ATtiny84 ............................................................................................................ |
225 |
29 |
Datasheet Revision History ................................................................ |
226 |
|
|
29.1 |
Rev E. 09/06 ...................................................................................................... |
226 |
|
29.2 |
Rev D. 08/06 ..................................................................................................... |
226 |
|
29.3 |
Rev C. 07/06 ..................................................................................................... |
226 |
|
29.4 |
Rev B. 05/06 ...................................................................................................... |
226 |
|
29.5 |
Rev A. 12/05 ...................................................................................................... |
227 |
v
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vi ATtiny24/44/84
8006E–AVR–09/06

Atmel Corporation |
Atmel Operations |
2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
Fax: 1(408) 487-2600
Regional Headquarters
Europe
Atmel Sarl
Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland
Tel: (41) 26-426-5555 Fax: (41) 26-426-5500
Asia
Room 1219
Chinachem Golden Plaza
77 Mody Road Tsimshatsui
East Kowloon
Hong Kong
Tel: (852) 2721-9778
Fax: (852) 2722-1369
Japan
9F, Tonetsu Shinkawa Bldg.
1-24-8 Shinkawa
Chuo-ku, Tokyo 104-0033
Japan
Tel: (81) 3-3523-3551
Fax: (81) 3-3523-7581
Memory
2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
Fax: 1(408) 436-4314
Microcontrollers
2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
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44306 Nantes Cedex 3, France
Tel: (33) 2-40-18-18-18
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Zone Industrielle
13106 Rousset Cedex, France
Tel: (33) 4-42-53-60-00
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1150 East Cheyenne Mtn. Blvd.
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Maxwell Building
East Kilbride G75 0QR, Scotland
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Theresienstrasse 2
Postfach 3535
74025 Heilbronn, Germany
Tel: (49) 71-31-67-0
Fax: (49) 71-31-67-2340
1150 East Cheyenne Mtn. Blvd.
Colorado Springs, CO 80906, USA
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Biometrics/Imaging/Hi-Rel MPU/
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Avenue de Rochepleine
BP 123
38521 Saint-Egreve Cedex, France
Tel: (33) 4-76-58-30-00
Fax: (33) 4-76-58-34-80
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