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ATtiny25/45/85 Auto

30. Errata

The revision letter in this section refers to the revision of the ATtiny25/45/85 device.

30.1ATtiny25/45/85 Rev. A

•Too high power down power consumption

•DebugWIRE looses communication when single stepping into interrupts

•PLL not locking

1. Too high power down power consumption

Three situations will lead to a too high power down power consumption. These are:

–An external clock is selected by fuses, but the IO PORT is still enabled as an output.

–The EEPROM is read before entering power down.

–VCC is 4.5 volts or higher.

Problem fix / Workaround

–When using external clock, avoid setting the clock pin as Output.

–Do not read the EEPROM if power down power consumption is important.

–Use VCC lower than 4.5 Volts.

2.DebugWIRE looses communication when single stepping into interrupts

When receiving an interrupt during single stepping, debugwire will loose

communication.

Problem fix / Workaround

–When singlestepping disable interrupts.

–When debugging interrupts, use breakpoints within the interrupt routine, and run into the interrupt.

3.PLL not locking

When running at frequencies below 6.0 MHz, the PLL will not lock

Problem fix / Workaround

– When using the PLL, run at 6.0 MHz or higher.

195

7598C–AVR–09/06



	.....................................................................................................Features		1
			1
1	Pin Configurations ...................................................................................		2
2	Overview ...................................................................................................		2
	2.1	Block Diagram ........................................................................................................	3
	2.2	Automotive Quality Grade ......................................................................................	4
	2.3	Pin Descriptions .....................................................................................................	5
3	About Code Examples .............................................................................		5
4	AVR CPU Core ..........................................................................................		5
	4.1	Introduction .............................................................................................................	5
	4.2	Architectural Overview ...........................................................................................	6
	4.3	ALU – Arithmetic Logic Unit ...................................................................................	7
	4.4	Status Register .......................................................................................................	7
	4.5	General Purpose Register File ...............................................................................	9
	4.6	Stack Pointer ........................................................................................................	10
	4.7	Instruction Execution Timing ................................................................................	10
	4.8	Reset and Interrupt Handling ...............................................................................	11
5	AVR ATtiny25/45/85 Memories .............................................................		13
	5.1	In-System Re-programmable Flash Program Memory .........................................	13
	5.2	SRAM Data Memory ............................................................................................	14
	5.3	EEPROM Data Memory .......................................................................................	15
	5.4	I/O Memory ...........................................................................................................	21
6	System Clock and Clock Options .........................................................		21
	6.1	Clock Systems and their Distribution ....................................................................	21
	6.2	Clock Sources ......................................................................................................	23
	6.3	Default Clock Source ............................................................................................	24
	6.4	Crystal Oscillator ..................................................................................................	24
	6.5	Low-frequency Crystal Oscillator ..........................................................................	25
	6.6	Calibrated Internal RC Oscillator ..........................................................................	26
	6.7	External Clock ......................................................................................................	27
	6.8	128 kHz Internal Oscillator ...................................................................................	28
	6.9	Clock Output Buffer ..............................................................................................	29
	6.10	System Clock Prescaler .....................................................................................	29
7	Power Management and Sleep Modes .................................................		31
	7.1	Idle Mode ..............................................................................................................	32

7598C–AVR–09/06



	7.2	................................................................................ADC Noise Reduction Mode		32
	7.3	Power-down Mode ...............................................................................................		32
	7.4		Power Reduction Register ....................................................................................	33
	7.5	Minimizing Power Consumption ...........................................................................		34
8 System Control and Reset ....................................................................				35
	8.1		Internal Voltage Reference ...................................................................................	40
	8.2	Watchdog Timer ...................................................................................................		41
	8.3		Timed Sequences for Changing the Configuration of the Watchdog Timer .........	44
9	Interrupts ................................................................................................			45
	9.1		Interrupt Vectors in ATtiny25/45/85 ......................................................................	45
10	I/O Ports ..................................................................................................			46
	10.1		Introduction .........................................................................................................	46
	10.2		Ports as General Digital I/O ................................................................................	47
	10.3		Alternate Port Functions .....................................................................................	52
	10.4		Register Description for I/O-Ports .......................................................................	57
11	External Interrupts .................................................................................			58
12	8-bit Timer/Counter0 with PWM ............................................................			60
	12.1		Overview ............................................................................................................	60
	12.2		Timer/Counter Clock Sources ............................................................................	62
	12.3		Counter Unit .......................................................................................................	62
	12.4		Output Compare Unit .........................................................................................	63
	12.5		Compare Match Output Unit ...............................................................................	64
	12.6		Modes of Operation ............................................................................................	65
	12.7		Timer/Counter Timing Diagrams ........................................................................	70
	12.8		8-bit Timer/Counter Register Description ...........................................................	71
13	Timer/Counter Prescaler .......................................................................			77
14	8-bit Timer/Counter1 ..............................................................................			79
	14.1		Timer/Counter1 ..................................................................................................	80
15	8-bit Timer/Counter1 in ATtiny15 Mode ...............................................			90
	15.1		Timer/Counter1 Prescaler ..................................................................................	91
	15.2		Timer/Counter1 ..................................................................................................	91
16	Dead Time Generator ...........................................................................			100
17	Universal Serial Interface – USI ..........................................................			103

7598C–AVR–09/06



		17.1	..........................................................................................................Overview	103
		17.1		103
		17.2	Functional Descriptions ....................................................................................	104
		17.3	Alternative USI Usage ......................................................................................	109
		17.4	USI Register Descriptions ................................................................................	110
18		Analog Comparator .............................................................................		114
		18.1	Analog Comparator Multiplexed Input ..............................................................	116
	19 Analog to Digital Converter ................................................................			117
		19.1	Features ...........................................................................................................	117
		19.2	Operation ..........................................................................................................	118
		19.3	Starting a Conversion .......................................................................................	119
		19.4	Prescaling and Conversion Timing ...................................................................	120
		19.5	Changing Channel or Reference Selection ......................................................	122
		19.6	ADC Noise Canceler ........................................................................................	123
		19.7	ADC Conversion Result ...................................................................................	126
	20 debugWIRE On-chip Debug System ..................................................			133
		20.1	Features ...........................................................................................................	133
		20.2	Overview ..........................................................................................................	133
		20.3	Physical Interface .............................................................................................	134
		20.4	Software Break Points ......................................................................................	134
		20.5	Limitations of debugWIRE ................................................................................	135
		20.6	debugWIRE Related Register in I/O Memory ...................................................	135
21		Self-Programming the Flash ...............................................................		135
		21.1	Addressing the Flash During Self-Programming ..............................................	136
22		Memory Programming .........................................................................		139
		22.1	Program And Data Memory Lock Bits ..............................................................	139
		22.2	Fuse Bytes .......................................................................................................	140
		22.3	Signature Bytes ................................................................................................	142
		22.4	Calibration Byte ................................................................................................	142
		22.5	Page Size .........................................................................................................	142
		22.6	Serial Downloading ..........................................................................................	143
		22.7	High-voltage Serial Programming .....................................................................	148
		22.8	High-voltage Serial Programming Algorithm ....................................................	149
		22.9	High-voltage Serial Programming Characteristics ............................................	155
23		Electrical Characteristics ....................................................................		156

iii

7598C–AVR–09/06



	23.1	............................................................................Absolute Maximum Ratings*	156
	23.2	External Clock Drive Waveforms ......................................................................	157
	23.3	External Clock Drive .........................................................................................	158
	23.4	ADC Characteristics – Preliminary Data ...........................................................	159
	23.5	Calibrated RC Oscillator Accuracy ...................................................................	160
24	Typical Characteristics ........................................................................		160
	24.1	Active Supply Current .......................................................................................	161
	24.2	Idle Supply Current ...........................................................................................	163
	24.3	Power-Down Supply Current ............................................................................	167
	24.4	Pin Pull-up ........................................................................................................	168
	24.5	Pin Driver Strength ...........................................................................................	171
	24.6	Pin Thresholds and Hysteresis .........................................................................	174
	24.7	BOD Thresholds and Analog Comparator Offset .............................................	177
	24.8	Internal Oscillator Speed ..................................................................................	178
	24.9	Current Consumption of Peripheral Units .........................................................	181
	24.10	Current Consumption in Reset and Reset Pulse width ..................................	182
	24.11	Analog to Digital Converter ............................................................................	183
25	Register Summary ...............................................................................		188
26	Instruction Set Summary ....................................................................		190
27	Ordering Information ...........................................................................		192
28	Packaging Information ........................................................................		193
	28.1	T5 Package ......................................................................................................	193
29	Document Revision History ................................................................		194
	29.1	Rev. 7598C - 09/06 ..........................................................................................	194
	29.2	Rev. 7598B - 08/06 ..........................................................................................	194
	29.3	Rev. 7598A - 04/06 ..........................................................................................	194
30	Errata .....................................................................................................		195
	30.1	ATtiny25/45/85 Rev. A ......................................................................................	195

7598C–AVR–09/06

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