14. Timer/Counter0

14.1Features

•Clear Timer on Compare Match (Auto Reload)

•Input Capture unit

•Four Independent Interrupt Sources (TOV0, OCF0A, OCF0B, ICF0)

•8-bit Mode with Two Independent Output Compare Units

•16-bit Mode with One Independent Output Compare Unit

14.2Overview

Timer/Counter0 is a general purpose 8-/16-bit Timer/Counter module, with two/one Output Compare units and Input Capture feature.

The Timer/Counter0 general operation is described in 8-/16-bit mode. A simplified block diagram of the 8-/16-bit Timer/Counter is shown in Figure 14-1. For the actual placement of I/O pins, refer to ”Pinout ATtiny261/461/861” on page 2. CPU accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in the ”Register Description” on page 84.

Figure 14-1. 8-/16-bit Timer/Counter Block Diagram

14.2.1Registers

The Timer/Counter0 Low Byte Register (TCNT0L) and Output Compare Registers (OCR0A and OCR0B) are 8-bit registers. Interrupt request (abbreviated to Int.Req. in Figure 14-1) signals are all visible in the Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure.

In 16-bit mode the Timer/Counter consists one more 8-bit register, the Timer/Counter0 High Byte Register (TCNT0H). Furthermore, there is only one Output Compare Unit in 16-bit mode as the two Output Compare Registers, OCR0A and OCR0B, are combined to one 16-bit Output Compare Register. OCR0A contains the low byte of the word and OCR0B contains the high byte of the word. When accessing 16-bit registers, special procedures described in section ”Accessing Registers in 16-bit Mode” on page 80 must be followed.

72 ATtiny261/461/861

2588B–AVR–11/06