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ATtiny261/461/861

12.3.2Alternate Functions of Port A

The Port A pins with alternate function are shown in Table 12-6.

Table 12-6. Port B Pins Alternate Functions

Port Pin

Alternate Function

 

 

PA7

ADC6 / AIN0 / PCINT7

 

 

PA6

ADC5 / AIN1 / PCINT6

 

 

PA5

ADC4 / AIN2 / PCINT5

 

 

PA4

ADC3 /ICP0/ PCINT4

 

 

PA3

AREF / PCINT3

 

 

PA2

ADC2 / INT1 / USCK / SCL / PCINT2

 

 

PA1

ADC1 / DO / PCINT1

 

 

PA0

ADC0 / DI / SDA / PCINT0

 

 

The alternate pin configuration is as follows:

• Port A, Bit 7- ADC6/AIN0/PCINT7

ADC6: Analog to Digital Converter, Channel 6.

AIN0: Analog Comparator Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator.

PCINT7: Pin Change Interrupt source 8.

• Port A, Bit 6 - ADC5/AIN1/PCINT6

ADC5: Analog to Digital Converter, Channel 5.

AIN1: Analog Comparator Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator.

PCINT6: Pin Change Interrupt source 6.

• Port A, Bit 5 - ADC4/AIN2/PCINT5

ADC4: Analog to Digital Converter, Channel 4.

AIN2: Analog Comparator Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator.

PCINT5: Pin Change Interrupt source 5.

• Port A, Bit 4 - ADC3/ICP0/PCINT4

ADC3: Analog to Digital Converter, Channel 3.

ICP0: Timer/Counter0 Input Capture Pin.

PCINT4: Pin Change Interrupt source 4.

• Port A, Bit 3 - AREF/PCINT3

AREF: External analog reference for ADC. Pullup and output driver are disabled on PA3 when the pin is used as an external reference or internal voltage reference with external capacitor at the AREF pin.

65

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PCINT3: Pin Change Interrupt source 3.

• Port A, Bit 2 - ADC2/INT1/USCK/SCL/PCINT2

ADC2: Analog to Digital Converter, Channel 2.

INT1: The PA2 pin can serve as an External Interrupt source 1.

USCK: Three-wire mode Universal Serial Interface Clock.

SCL: Two-wire mode Serial Clock for USI Two-wire mode.

PCINT2: Pin Change Interrupt source 2.

• Port A, Bit 1 - ADC1/DO/PCINT1

ADC1: Analog to Digital Converter, Channel 1.

DO: Three-wire mode Universal Serial Interface Data output. Three-wire mode Data output overrides PORTA1 value and it is driven to the port when data direction bit DDA1 is set. PORTA1 still enables the pull-up, if the direction is input and PORTA1 is set.

PCINT1: Pin Change Interrupt source 1.

• Port A, Bit 0 - ADC0/DI/SDA/PCINT0

ADC0: Analog to Digital Converter, Channel 0.

DI: Data Input in USI Three-wire mode. USI Three-wire mode does not override normal port functions, so pin must be configure as an input for DI function.

SDA: Two-wire mode Serial Interface Data.

PCINT0: Pin Change Interrupt source 0.

Table 12-7 and Table 12-8 relate the alternate functions of Port A to the overriding signals shown in Figure 12-5 on page 59.

Table 12-7.

Overriding Signals for Alternate Functions in PA7..PA4

 

 

 

Signal

 

PA7/ADC6/AIN0/

 

PA6/ADC5/AIN1/

 

PA5/ADC4/AIN2/

 

PA4/ADC3/ICP0/

Name

 

PCINT7

 

PCINT6

 

PCINT5

 

PCINT4

 

 

 

 

 

 

 

 

 

 

PUOE

 

0

 

0

 

0

 

0

 

 

 

 

 

 

 

 

 

 

 

PUOV

 

0

 

0

 

0

 

0

 

 

 

 

 

 

 

 

 

 

 

DDOE

 

0

 

0

 

0

 

0

 

 

 

 

 

 

 

 

 

 

 

DDOV

 

0

 

0

 

0

 

0

 

 

 

 

 

 

 

 

 

 

 

PVOE

 

0

 

0

 

0

 

0

 

 

 

 

 

 

 

 

 

 

 

PVOV

 

0

 

0

 

0

 

0

 

 

 

 

 

 

 

 

 

 

 

PTOE

 

0

 

0

 

0

 

0

 

 

 

 

 

 

 

 

 

 

DIEOE

 

PCINT7 • PCIE +

 

PCINT6 • PCIE +

 

PCINT5 • PCIE +

 

PCINT4 • PCIE +

 

 

ADC6D

 

ADC5D

 

ADC4D

 

ADC3D

 

 

 

 

 

 

 

 

 

 

 

 

 

DIEOV

 

 

 

 

 

 

 

 

 

 

 

 

ADC6D

ADC5D

ADC4D

ADC3D

 

 

 

 

 

 

 

 

 

DI

 

PCINT7

 

PCINT6

 

PCINT5

 

ICP0/PCINT4

 

 

 

 

 

 

AIO

 

ADC6, AIN0

ADC5, AIN1

ADC4, AIN2

ADC3

 

 

 

 

 

 

 

 

 

 

 

 

 

66 ATtiny261/461/861

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ATtiny261/461/861

Table 12-8.

Overriding Signals for Alternate Functions in PA3..PA0

 

 

 

 

 

Signal

 

PA3/AREF/

 

PA2/ADC2/INT1/

PA1/ADC1/DO/

PA0/ADC0/DI/SDA/

Name

 

PCINT3

 

USCK/SCL/PCINT2

PCINT1

PCINT0

 

 

 

 

 

 

 

 

 

 

 

PUOE

 

0

0

 

 

0

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PUOV

 

0

0

 

 

0

0

 

 

 

 

 

 

 

 

 

 

DDOE

 

0

 

USI_TWO_WIRE • USIPOS

0

USI_TWO_WIRE •

 

 

 

 

 

 

 

 

USIPOS

DDOV

 

0

 

(USI_SCL_HOLD +

 

 

 

+

 

 

0

(SDA

PORTB0)

 

 

 

 

PORTB2)

• DDB2 • USIPOS

DDRB0 • USIPOS

 

 

 

 

 

 

PVOE

 

0

USI_TWO_WIRE • DDRB2

USI_THREE_WIRE

USI_TWO_WIRE •

 

 

 

 

 

 

 

• USIPOS

DDRB0 • USIPOS

 

 

 

 

 

 

 

 

 

 

 

PVOV

 

0

0

 

 

DO • USIPOS

0

 

 

 

 

 

 

 

 

 

 

 

 

 

PTOE

 

0

 

USI_PTOE • USIPOS

0

0

 

 

 

 

 

 

 

 

 

 

DIEOE

 

PCINT3 • PCIE

 

PCINT2 • PCIE + INT1 +

PCINT1 • PCIE +

PCINT0 • PCIE + ADC0D

 

 

 

 

ADC2D + USISIE • USIPOS

ADC1D

+ USISIE • USIPOS

 

 

 

 

 

 

 

 

DIEOV

 

0

 

 

 

ADC1D

ADC0D

 

ADC2D

 

 

 

 

 

 

DI

 

PCINT3

USCK/SCL/INT1/ PCINT2

PCINT1

DI/SDA/PCINT0

 

 

 

 

 

 

AIO

 

AREF

ADC2

ADC1

ADC0

 

 

 

 

 

 

 

 

 

 

 

 

 

67

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