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ATmega48/88/168

Table 27-3.

Lock Bit Protection Modes(1)(2). Only ATmega88/168.

BLB0 Mode

 

BLB02

BLB01

 

 

 

 

 

 

1

 

1

1

No restrictions for SPM or LPM accessing the Application

 

section.

 

 

 

 

 

 

 

 

 

2

 

1

0

SPM is not allowed to write to the Application section.

 

 

 

 

 

 

 

 

 

SPM is not allowed to write to the Application section, and LPM

 

 

 

 

executing from the Boot Loader section is not allowed to read

3

 

0

0

from the Application section. If Interrupt Vectors are placed in

 

 

 

 

the Boot Loader section, interrupts are disabled while executing

 

 

 

 

from the Application section.

 

 

 

 

 

 

 

 

 

LPM executing from the Boot Loader section is not allowed to

4

 

0

1

read from the Application section. If Interrupt Vectors are placed

 

in the Boot Loader section, interrupts are disabled while

 

 

 

 

 

 

 

 

executing from the Application section.

 

 

 

 

 

BLB1 Mode

 

BLB12

BLB11

 

 

 

 

 

 

1

 

1

1

No restrictions for SPM or LPM accessing the Boot Loader

 

section.

 

 

 

 

 

 

 

 

 

2

 

1

0

SPM is not allowed to write to the Boot Loader section.

 

 

 

 

 

 

 

 

 

SPM is not allowed to write to the Boot Loader section, and LPM

 

 

 

 

executing from the Application section is not allowed to read

3

 

0

0

from the Boot Loader section. If Interrupt Vectors are placed in

 

 

 

 

the Application section, interrupts are disabled while executing

 

 

 

 

from the Boot Loader section.

 

 

 

 

 

 

 

 

 

LPM executing from the Application section is not allowed to

4

 

0

1

read from the Boot Loader section. If Interrupt Vectors are

 

placed in the Application section, interrupts are disabled while

 

 

 

 

 

 

 

 

executing from the Boot Loader section.

 

 

 

 

 

Notes: 1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2. 2. “1” means unprogrammed, “0” means programmed

27.2Fuse Bits

The ATmega48/88/168 has three Fuse bytes. Table 27-4 - Table 27-7 describe briefly the functionality of all the fuses and how they are mapped into the Fuse bytes. Note that the fuses are read as logical zero, “0”, if they are programmed.

Table 27-4. Extended Fuse Byte for mega48

Extended Fuse Byte

Bit No

Description

Default Value

 

 

 

 

7

1

 

 

 

 

6

1

 

 

 

 

5

1

 

 

 

 

4

1

 

 

 

 

3

1

 

 

 

 

2

1

 

 

 

 

1

1

 

 

 

 

SELFPRGEN

0

Self Programming Enable

1 (unprogrammed)

 

 

 

 

287

2545M–AVR–09/07

Table 27-5. Extended Fuse Byte for mega88/168

Extended Fuse Byte

Bit No

Description

Default Value

 

 

 

 

 

7

1

 

 

 

 

 

 

6

1

 

 

 

 

 

 

5

1

 

 

 

 

 

 

4

1

 

 

 

 

 

 

3

1

 

 

 

 

 

 

 

 

Select Boot Size

 

 

BOOTSZ1

2

(see Table 26-6 on page 282

0

(programmed)(1)

and Table 26-9 on page 283

 

 

 

 

 

 

for details)

 

 

 

 

 

 

 

 

 

Select Boot Size

 

 

BOOTSZ0

1

(see Table 26-6 on page 282

0

(programmed)(1)

and Table 26-9 on page 283

 

 

 

 

 

 

for details)

 

 

 

 

 

 

 

BOOTRST

0

Select Reset Vector

1

(unprogrammed)

 

 

 

 

 

Note: 1. The default value of BOOTSZ1..0 results in maximum Boot Size. See Table 27-11 on page 291 for details.

Table 27-6. Fuse High Byte

High Fuse Byte

Bit No

Description

Default Value

 

 

 

 

 

RSTDISBL(1)

7

External Reset Disable

1

(unprogrammed)

DWEN

6

debugWIRE Enable

1

(unprogrammed)

 

 

 

 

 

SPIEN(2)

5

Enable Serial Program and

0

(programmed, SPI

Data Downloading

programming enabled)

 

 

 

 

 

 

 

WDTON(3)

4

Watchdog Timer Always On

1

(unprogrammed)

 

 

EEPROM memory is

1 (unprogrammed), EEPROM

EESAVE

3

preserved through the Chip

not reserved

 

 

Erase

 

 

 

 

 

 

 

 

 

BODLEVEL2(4)

2

Brown-out Detector trigger

1

(unprogrammed)

level

 

 

 

 

 

 

 

 

 

BODLEVEL1(4)

1

Brown-out Detector trigger

1

(unprogrammed)

level

 

 

 

 

 

 

 

 

 

BODLEVEL0(4)

0

Brown-out Detector trigger

1

(unprogrammed)

level

 

 

 

 

 

 

 

 

 

Notes: 1. See “Alternate Functions of Port C” on page 82 for description of RSTDISBL Fuse.

2.The SPIEN Fuse is not accessible in serial programming mode.

3.See “WDTCSR – Watchdog Timer Control Register” on page 54 for details.

4.See Table 28-4 on page 308 for BODLEVEL Fuse decoding.

288 ATmega48/88/168

2545M–AVR–09/07

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