
- •Features
- •Pin Configurations
- •Description
- •Block Diagram
- •Pin Descriptions
- •Port A (PA3..PA0)
- •Port B (PB7..PB0)
- •Port D (PD7..PD0)
- •XTAL1
- •XTAL2
- •RESET
- •Clock Options
- •Internal RC Oscillator
- •Crystal Oscillator
- •External Clock
- •External RC Oscillator
- •Register Indirect
- •I/O Direct
- •I/O Memory
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Watchdog Reset
- •Interrupt Handling
- •Interrupt Response Time
- •External Interrupt
- •Low-level Input Interrupt
- •Sleep Modes
- •Idle Mode
- •Power-down Mode
- •Timer/Counter0
- •Timer/Counter Prescaler
- •Watchdog Timer
- •Hardware Modulator
- •Analog Comparator
- •I/O Ports
- •Port A
- •Port A as General Digital I/O
- •Alternate Function of PA2
- •Port A Schematics
- •Port B
- •Port B as General Digital Input
- •Alternate Functions of Port B
- •Port B Schematics
- •Port D
- •Port D as General Digital I/O
- •Fuse Bits
- •Signature Bytes
- •Calibration Byte
- •Programming the Flash
- •Parallel Programming
- •Signal Names
- •Enter Programming Mode
- •Chip Erase
- •Programming the Flash
- •Reading the Flash
- •Programming the Fuse Bits
- •Programming the Lock Bits
- •Parallel Programming Characteristics
- •Electrical Characteristics
- •Absolute Maximum Ratings
- •DC Characteristics
- •External Clock Drive Waveforms
- •External Clock Drive
- •Register Summary
- •Instruction Set Summary
- •Ordering Information
- •Packaging Information
- •Errata
- •All revisions
- •Table of Contents

Parallel Programming
Characteristics
Figure 39. Parallel Programming Timing
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tXLWL |
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XTAL1 |
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tXHXL |
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Data & Contol |
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tDVXH |
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tXLDX |
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tBVWL |
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(DATA, XA0/1, BS) |
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tWLWH |
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WR |
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tRHBX |
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RDY/BSY |
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tWLRL |
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tWLRH |
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OE |
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tXLOL |
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tOHDZ |
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DATA |
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tOLDV |
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Write
Read
Parallel Programming Characteristics
TA = 25°C ± 10%, VCC = 5V ± 10%
Symbol |
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Parameter |
Min |
Typ |
Max |
Unit |
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VPP |
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Programming Enable Voltage |
11.5 |
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12.5 |
V |
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IPP |
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Programming Enable Current |
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250.0 |
µA |
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tDVXH |
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Data & Control Valid before XTAL1 High |
67.0 |
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ns |
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tXHXL |
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XTAL1 Pulse Width High |
67.0 |
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ns |
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tXLDX |
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Data & Control Hold after XTAL1 Low |
67.0 |
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ns |
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tXLWL |
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XTAL1 Low to |
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Low |
67.0 |
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ns |
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WR |
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tBVWL |
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BS Valid to |
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Low |
67.0 |
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ns |
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WR |
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tRHBX |
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BS Hold after RDY/BSY |
High |
67.0 |
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ns |
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tWLWH |
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Pulse Width Low |
67.0 |
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ns |
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WR |
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tWLRL |
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Low |
0.0 |
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2.5 |
µs |
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WR |
Low to RDY/BSY |
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tWLRH |
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High |
0.5 |
0.7 |
0.9 |
ms |
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WR |
Low to RDY/BSY |
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tXLOL |
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XTAL1 Low to |
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Low |
67.0 |
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ns |
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OE |
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tOLDV |
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Low to DATA Valid |
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20.0 |
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ns |
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OE |
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tOHDZ |
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High to DATA Tri-stated |
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20.0 |
ns |
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OE |
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52 ATtiny28L/V
1062G–AVR–01/06