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Table 68. Fuse Low Byte

Fuse Low Byte

Bit No

Description

Default Value

 

 

 

 

 

CKDIV8

7

Divide clock by 8

0

(programmed)

 

 

 

 

 

CKOUT

6

Output Clock on CKOUT pin

1

(unprogrammed)

 

 

 

 

 

SUT1

5

Select start-up time

1

(unprogrammed)(1)

SUT0

4

Select start-up time

0

(programmed)(1)

CKSEL3

3

Select Clock source

0

(programmed)(2)

CKSEL2

2

Select Clock source

1

(unprogrammed)(2)

CKSEL1

1

Select Clock source

0

(programmed)(2)

CKSEL0

0

Select Clock source

0

(programmed)(2)

Note: 1. The default value of SUT1..0 results in maximum start-up time for the default clock

 

source. See Table 15 on page 33 for details.

 

2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 8 MHz.

 

The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are

 

locked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the

 

Lock bits.

Latching of Fuses

The fuse values are latched when the device enters programming mode and changes of

 

the fuse values will have no effect until the part leaves Programming mode. This does

 

not apply to the EESAVE Fuse which will take effect once it is programmed. The fuses

 

are also latched on Power-up in Normal mode.

Signature Bytes

Calibration Byte

All Atmel microcontrollers have a three-byte signature code which identifies the device. This code can be read in both serial and parallel mode, also when the device is locked. The three bytes reside in a separate address space.

For the ATtiny2313 the signature bytes are:

1.0x000: 0x1E (indicates manufactured by Atmel).

2.0x001: 0x91 (indicates 2KB Flash memory).

3.0x002: 0x0A (indicates ATtiny2313 device when 0x001 is 0x91).

The ATtiny2313 stores two different calibration values for the internal RC Oscillator. These bytes resides in the high byte of address 0x0000 and 0x0001 in the signature address space for 4 and 8 MHz respectively. During reset, the 4 MHz value is automatically written to the “Oscillator Calibration Register – OSCCAL” on page 25, to ensure correct frequency of the calibrated RC Oscillator.

Page Size

Table 69. No. of Words in a Page and No. of Pages in the Flash

Flash Size

Page Size

PCWORD

No. of Pages

PCPAGE

PCMSB

 

 

 

 

 

 

1K words (2K bytes)

16 words

PC[3:0]

64

PC[9:4]

9

 

 

 

 

 

 

160 ATtiny2313/V

2543H–AVR–02/05

Parallel Programming

Parameters, Pin

Mapping, and

Commands

Signal Names

ATtiny2313/V

Table 70. No. of Words in a Page and No. of Pages in the EEPROM

EEPROM Size

Page Size

PCWORD

No. of Pages

PCPAGE

EEAMSB

 

 

 

 

 

 

128 bytes

4 bytes

EEA[1:0]

32

EEA[6:2]

6

 

 

 

 

 

 

This section describes how to parallel program and verify Flash Program memory, EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATtiny2313. Pulses are assumed to be at least 250 ns unless otherwise noted.

In this section, some pins of the ATtiny2313 are referenced by signal names describing their functionality during parallel programming, see Figure 69 and Table 71. Pins not described in the following table are referenced by pin names.

The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse. The bit coding is shown in Table 73.

When pulsing WR or OE, the command loaded determines the action executed. The different Commands are shown in Table 74.

Figure 69. Parallel Programming

+5V

RDY/BSY PD1

VCC

OE PD2

WR PD3

BS1/PAGEL PD4

XA0

 

PD5

PB7 - PB0

 

DATA I/O

 

 

 

 

 

 

XA1/BS2

 

PD6

 

 

 

 

 

 

 

+12 V RESET

XTAL1

GND

Table 71. Pin Name Mapping

Signal Name

 

 

 

 

 

in

Pin

 

 

Programming

 

 

Mode

Name

I/O

Function

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PD1

O

0: Device is busy programming, 1: Device is ready for

RDY/BSY

new command.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PD2

I

Output Enable (Active low).

 

 

OE

 

 

 

 

 

 

 

 

 

 

 

 

PD3

I

Write Pulse (Active low).

 

WR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Byte Select 1 (“0” selects low byte, “1” selects high

BS1/PAGEL

PD4

I

byte).

 

 

 

 

 

 

 

 

 

Program Memory and EEPROM Data Page Load.

 

 

 

 

 

 

 

 

 

 

161

2543H–AVR–02/05

Table 71. Pin Name Mapping (Continued)

Signal Name

 

 

 

 

 

in

Pin

 

 

 

 

Programming

 

 

 

 

Mode

Name

I/O

Function

 

 

 

 

XA0

PD5

I

XTAL Action Bit 0

 

 

 

 

 

 

 

XTAL Action Bit 1.

XA1/BS2

PD6

I

Byte Select 2 (“0” selects low byte, “1” selects 2’nd high

 

 

 

byte).

 

 

 

 

 

 

DATA I/O

PB7-0

I/O

Bi-directional Data bus (Output when

 

is low).

OE

 

 

 

 

 

 

Table 72. Pin Values Used to Enter Programming Mode

 

Pin

Symbol

Value

 

 

 

XA1

Prog_enable[3]

0

 

 

 

XA0

Prog_enable[2]

0

 

 

 

BS1

Prog_enable[1]

0

 

 

 

 

 

 

 

 

Prog_enable[0]

0

 

WR

 

 

 

 

 

Table 73. XA1 and XA0 Coding

XA1

XA0

Action when XTAL1 is Pulsed

 

 

 

0

0

Load Flash or EEPROM Address (High or low address byte

 

 

determined by BS1).

 

 

 

0

1

Load Data (High or Low data byte for Flash determined by BS1).

 

 

 

1

0

Load Command

 

 

 

1

1

No Action, Idle

 

 

 

Table 74. Command Byte Bit Coding

Command Byte

Command Executed

 

 

1000 0000

Chip Erase

 

 

0100 0000

Write Fuse bits

 

 

0010 0000

Write Lock bits

 

 

0001 0000

Write Flash

 

 

0001 0001

Write EEPROM

 

 

0000 1000

Read Signature Bytes and Calibration byte

 

 

0000 0100

Read Fuse and Lock bits

 

 

0000 0010

Read Flash

 

 

0000 0011

Read EEPROM

 

 

162 ATtiny2313/V

2543H–AVR–02/05

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