- •Features
- •Pin Configurations
- •Overview
- •Block Diagram
- •Disclaimer
- •Pin Descriptions
- •Port C (PC5..PC0)
- •PC6/RESET
- •Port D (PD7..PD0)
- •RESET
- •AVCC
- •AREF
- •AVR CPU Core
- •Introduction
- •Architectural Overview
- •Status Register
- •Stack Pointer
- •Interrupt Response Time
- •SRAM Data Memory
- •EEPROM Data Memory
- •EEPROM Read/Write Access
- •I/O Memory
- •Clock Systems and their Distribution
- •CPU Clock – clkCPU
- •I/O Clock – clkI/O
- •Flash Clock – clkFLASH
- •ADC Clock – clkADC
- •Clock Sources
- •Crystal Oscillator
- •External RC Oscillator
- •External Clock
- •Timer/Counter Oscillator
- •Idle Mode
- •Power-down Mode
- •Power-save Mode
- •Standby Mode
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •Resetting the AVR
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Watchdog Timer
- •Timed Sequences for Changing the Configuration of the Watchdog Timer
- •Interrupts
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Reading the Pin Value
- •Unconnected pins
- •Alternate Port Functions
- •Alternate Functions of Port B
- •Alternate Functions of Port C
- •Alternate Functions of Port D
- •Register Description for I/O Ports
- •External Interrupts
- •8-bit Timer/Counter0
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Operation
- •Internal Clock Source
- •Prescaler Reset
- •External Clock Source
- •16-bit Timer/Counter1
- •Overview
- •Registers
- •Definitions
- •Compatibility
- •Counter Unit
- •Input Capture Unit
- •Input Capture Trigger Source
- •Noise Canceler
- •Using the Input Capture Unit
- •Output Compare Units
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •8-bit Timer/Counter2 with PWM and Asynchronous Operation
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Output Compare Unit
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •Timer/Counter Prescaler
- •SS Pin Functionality
- •Slave Mode
- •Master Mode
- •SPI Control Register – SPCR
- •SPI Status Register – SPSR
- •SPI Data Register – SPDR
- •Data Modes
- •USART
- •Overview
- •AVR USART vs. AVR UART – Compatibility
- •Clock Generation
- •External Clock
- •Synchronous Clock Operation
- •Frame Formats
- •Parity Bit Calculation
- •USART Initialization
- •Sending Frames with 9 Data Bits
- •Parity Generator
- •Disabling the Transmitter
- •Receiver Error Flags
- •Parity Checker
- •Disabling the Receiver
- •Flushing the Receive Buffer
- •Asynchronous Data Recovery
- •Using MPCM
- •Write Access
- •Read Access
- •Two-wire Serial Interface
- •Features
- •TWI Terminology
- •Electrical Interconnection
- •Transferring Bits
- •START and STOP Conditions
- •Address Packet Format
- •Data Packet Format
- •Overview of the TWI Module
- •SCL and SDA Pins
- •Bit Rate Generator Unit
- •Bus Interface Unit
- •Address Match Unit
- •Control Unit
- •TWI Register Description
- •TWI Bit Rate Register – TWBR
- •TWI Control Register – TWCR
- •TWI Status Register – TWSR
- •TWI Data Register – TWDR
- •Using the TWI
- •Transmission Modes
- •Master Transmitter Mode
- •Master Receiver Mode
- •Slave Receiver Mode
- •Slave Transmitter Mode
- •Miscellaneous States
- •Analog Comparator
- •Analog Comparator Multiplexed Input
- •Features
- •Starting a Conversion
- •Changing Channel or Reference Selection
- •ADC Input Channels
- •ADC Voltage Reference
- •ADC Noise Canceler
- •Analog Input Circuitry
- •ADC Accuracy Definitions
- •ADC Conversion Result
- •The ADC Data Register – ADCL and ADCH
- •ADLAR = 0
- •ADLAR = 1
- •Boot Loader Features
- •Application Section
- •BLS – Boot Loader Section
- •Boot Loader Lock Bits
- •Performing a Page Write
- •Using the SPM Interrupt
- •Setting the Boot Loader Lock Bits by SPM
- •Reading the Fuse and Lock Bits from Software
- •Preventing Flash Corruption
- •Simple Assembly Code Example for a Boot Loader
- •Fuse Bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Signal Names
- •Parallel Programming
- •Enter Programming Mode
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Programming the Lock Bits
- •Reading the Signature Bytes
- •Reading the Calibration Byte
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •DC Characteristics
- •External Clock Drive Waveforms
- •External Clock Drive
- •Two-wire Serial Interface Characteristics
- •ADC Characteristics
- •Active Supply Current
- •Idle Supply Current
- •Power-down Supply Current
- •Power-save Supply Current
- •Standby Supply Current
- •Pin Pull-up
- •Pin Driver Strength
- •Internal Oscillator Speed
- •Ordering Information
- •Packaging Information
- •Erratas
- •Datasheet Change Log for ATmega8
- •Changes from Rev. 2486K-08/03 to Rev. 2486L-10/03
- •Changes from Rev. 2486K-08/03 to Rev. 2486L-10/03
- •Changes from Rev. 2486J-02/03 to Rev. 2486K-08/03
- •Changes from Rev. 2486I-12/02 to Rev. 2486J-02/03
- •Changes from Rev. 2486H-09/02 to Rev. 2486I-12/02
- •Changes from Rev. 2486G-09/02 to Rev. 2486H-09/02
- •Changes from Rev. 2486F-07/02 to Rev. 2486G-09/02
- •Changes from Rev. 2486E-06/02 to Rev. 2486F-07/02
- •Changes from Rev. 2486D-03/02 to Rev. 2486E-06/02
- •Changes from Rev. 2486C-03/02 to Rev. 2486D-03/02
- •Changes from Rev. 2486B-12/01 to Rev. 2486C-03/02
- •Table of Contents
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Idle Supply Current |
Figure 125. Idle Supply Current vs. Frequency (0.1 - 1.0 MHz) |
IDLE SUPPLY CURRENT vs. FREQUENCY
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0.1 - 1.0 MHz |
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0.7 |
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5.5V |
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0.6 |
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5.0V |
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0.5 |
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4.5V |
(mA) |
0.4 |
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4.0V |
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3.3V |
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CC |
0.3 |
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I |
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3.0V |
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0.2 |
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2.7V |
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0.1 |
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0 |
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0 |
0.1 |
0.2 |
0.3 |
0.4 |
0.5 |
0.6 |
0.7 |
0.8 |
0.9 |
1 |
Frequency (MHz)
Figure 126. Idle Supply Current vs. Frequency (1 - 20 MHz)
IDLE SUPPLY CURRENT vs. FREQUENCY
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1 - 20 MHz |
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14 |
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5.5V |
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12 |
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5.0V |
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10 |
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4.5V |
(mA) |
8 |
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4.0V |
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CC |
6 |
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I |
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4 |
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3.3V |
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2 |
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3.0V |
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2.7V |
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0 |
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0 |
2 |
4 |
6 |
8 |
10 |
12 |
14 |
16 |
18 |
20 |
Frequency (MHz)
248 ATmega8(L)
2486M–AVR–12/03
ATmega8(L)
Figure 127. Idle Supply Current vs. VCC (Internal RC Oscillator, 8 MHz)
IDLE SUPPLY CURRENT vs. VCC
INTERNAL RC OSCILLATOR, 8 MHz
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8 |
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-40°C |
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7 |
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25°C |
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85°C |
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6 |
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5 |
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(mA) |
4 |
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CC |
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I |
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3 |
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2 |
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1 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
Figure 128. Idle Supply Current vs. VCC (Internal RC Oscillator, 4 MHz)
IDLE SUPPLY CURRENT vs. VCC
INTERNAL RC OSCILLATOR, 4 MHz
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4 |
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-40°C |
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3.5 |
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25°C |
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85°C |
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3 |
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2.5 |
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(mA) |
2 |
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CC |
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I |
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1.5 |
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1 |
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0.5 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
249
2486M–AVR–12/03
Figure 129. Idle Supply Current vs. VCC (Internal RC Oscillator, 2 MHz)
IDLE SUPPLY CURRENT vs. VCC
INTERNAL RC OSCILLATOR, 2 MHz
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1.8 |
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-40°C |
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1.6 |
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85°C |
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25°C |
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1.4 |
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1.2 |
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(mA) |
1 |
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CC |
0.8 |
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I |
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0.6 |
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0.4 |
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0.2 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
Figure 130. Idle Supply Current vs. VCC (Internal RC Oscillator, 1 MHz)
IDLE SUPPLY CURRENT vs. VCC
INTERNAL RC OSCILLATOR, 1 MHz
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0.9 |
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85°C |
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0.8 |
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25°C |
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-40°C |
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0.7 |
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(mA) |
0.6 |
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0.5 |
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CC |
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I |
0.4 |
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0.3 |
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0.2 |
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0.1 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
250 ATmega8(L)
2486M–AVR–12/03
ATmega8(L)
Figure 131. Idle Supply Current vs. VCC (32 kHz External Oscillator)
IDLE SUPPLY CURRENT vs. VCC
32kHz EXTERNAL OSCILLATOR
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40 |
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35 |
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25°C |
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30 |
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25 |
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(uA) |
20 |
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CC |
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I |
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15 |
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10 |
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5 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
Power-down Supply Current |
Figure 132. Power-down Supply Current vs. VCC (Watchdog Timer Disabled) |
POWER-DOWN SUPPLY CURRENT vs. VCC
WATCHDOG TIMER DISABLED
2.5 |
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85°C |
2 |
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1.5 |
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-40°C |
(uA) |
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25°C |
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CC |
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I |
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1 |
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0.5 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
251
2486M–AVR–12/03