Chapter 4 Hardware Overview

Analog Trigger Circuit

The NI 5102 contains a sophisticated analog trigger circuit that accepts boolean outputs from level comparators and makes intelligent decisions about the trigger. Several triggering modes are available, including edge, window, and hysteresis. For information on configuring trigger functions, see the Triggering Functions and Parameters section in Chapter 3, Common Functions and Examples, of your NI-SCOPE Software User Manual.

Trigger Hold-off

Trigger hold-off is the length of time that the NI 5102 waits after finishing an acquisition before it may accept another trigger. Hold-off is provided in hardware using a 24-bit down counter clocked by a 2.5 MHz internal timebase. With this configuration, you can select a hardware hold-off value of 800 ns to 6.71 s in increments of 400 ns.

When an acquisition is in progress, the counter is loaded with a digital value that corresponds to the desired hold-off time. The End of Acquisition signal triggers the counter to start counting down. Before the counter reaches its terminal count (TC), all triggers are rejected in hardware. At TC, the hold-off counter reloads the hold-off value and prepares to accept the next trigger. Figure 4-11 shows a timing diagram of signals when hold-off is enabled.

Chapter 4 Hardware Overview

Figure 4-11. Pretrigger and Posttrigger Acquisitions with Hold-off

Note When you use trigger hold-off, you cannot calibrate your probe or generate an asynchronous frequency at the same time. The counter that is used to implement trigger hold-off also generates the probe calibration signal and the asynchronous pulse train.