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30 ULP Coprocessor (ULP)

30 ULP Coprocessor (ULP)

30.1Introduction

The ULP coprocessor is an ultra-low-power processor that remains powered on during the Deep-sleep mode of the main SoC. Hence, the developer can store in the RTC memory a program for the ULP coprocessor to access peripheral devices, internal sensors and RTC registers during deep sleep. This is useful for designing applications where the CPU needs to be woken up by an external event, or timer, or a combination of these, while maintaining minimal power consumption.

30.2Features

Contains up to 8 KB of SRAM for instructions and data

Uses RTC_FAST_CLK, which is 8 MHz

Works both in normal and deep sleep

Is able to wake up the digital core or send an interrupt to the CPU

Can access peripheral devices, internal sensors and RTC registers

Contains four 16-bit general-purpose registers (R0, R1, R2, R3) for manipulating data and accessing memory

Includes one 8-bit Stage_cnt register which can be manipulated by ALU and used in JUMP instructions

APB Bus

 

bridge

 

 

 

RTC CNTL REG

RTC Memory

Arbiter

RTC IO REG

 

SARADC REG

I2C CTRL

 

 

 

RTC I2C REG

TSENS CTRL

ULP

RTC Timer

 

 

Coprocessor

SAR CTRL

 

 

 

 

 

ESP32 RTC

Figure 30­1. ULP Coprocessor Diagram

Espressif Systems

656

ESP32 TRM (Version 5.0)

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