15 Remote Control Peripheral (RMT)

To transmit more data than can be fitted in the channel’s RAM, the wraparound mode can be enabled. In this mode, when the transmitter has reached the last entry in the channel’s memory, it will loop back to the first byte. To use this mechanism for sending more data than can be fitted in the channel’s RAM, fill the RAM with the initial events and set RMT_CHn_TX_LIM_REG to cause an RMT_CHn_TX_THR_EVENT_INT interrupt before the wraparound happens. Then, when the interrupt happens, the already sent data should be replaced by subsequent events, so that when the wraparound happens the transmitter will seamlessly continue sending the new events.

With or without the wraparound mode enabled, transmission ends when an entry with zero length is encountered. When this happens, the transmitter will generate an RMT_CHn_TX_END_INT interrupt and return to the idle state. When a transmitter is in the idle state, the output level defaults to end-mark 0. Users can also configure RMT_IDLE_OUT_EN_CHn and RMT_IDLE_OUT_LV_CHn to control the output level manually.

The output of the transmitter can be modulated using a carrier wave by setting RMT_CARRIER_EN_CHn. The carrier frequency and duty cycle can be configured by adjusting the carrier’s high and low durations in channelclock cycles, in RMT_CARRIER_HIGH_CHn and RMT_CARRIER_LOW_CHn.

15.2.5 Receiver

When RMT_RX_EN_CHn is set to 1, the receiver in channel n becomes active, measuring the duration between input signal edges. These will be written as period/level value pairs to the channel RAM in the same fashion as the transmitter sends them. Receiving ends, when the receiver detects no change in signal level for more than RMT_IDLE_THRES_CHn channel clock ticks. The receiver will write a final entry with 0 period, generate an RMT_CHn_RX_END_INT_RAW interrupt and return to the idle state.

The receiver has an input signal filter which can be configured using RMT_RX_FILTER_EN_CHn: The filter will remove pulses with a length of less than RMT_RX_FILTER_THRES_CHn in APB clock periods.

When the RMT module is inactive, the RAM can be put into low-power mode by setting the RMT_MEM_PD register to 1.

15.2.6 Interrupts

•RMT_CHn_TX_THR_EVENT_INT: Triggered when the amount of data the transmitter has sent matches the value of RMT_CHn_TX_LIM_REG.

•RMT_CHn_TX_END_INT: Triggered when the transmitter has finished transmitting the signal.

•RMT_CHn_RX_END_INT: Triggered when the receiver has finished receiving a signal.

15.3Register Summary

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15 Remote Control Peripheral (RMT)

15.4Registers

The addresses in parenthesis besides register names are the register addresses relative to the RMT base address provided in Table 1-6 Peripheral Address Mapping in Chapter 1 System and Memory. The absolute register addresses are listed in Section 15.3 Register Summary.

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15 Remote Control Peripheral (RMT)

Register 15.1. RMT_CHnCONF0_REG (n: 0­7) (0x0020+8*n)

RMT_MEM_PD This bit is used to power down the entire RMT RAM block. (It only exists in RMT_CH0CONF0). 1: power down memory; 0: power up memory. (R/W)

RMT_CARRIER_OUT_LV_CHn This bit is used for configuration when the carrier wave is being transmitted. Transmit on low output level with 0, and transmit on high output level with 1. (R/W)

RMT_CARRIER_EN_CHn This is the carrier modulation enable-control bit for channel n. Carrier modulation is enabled with 1, while carrier modulation is disabled with 0. (R/W)

RMT_MEM_SIZE_CHn This register is used to configure the amount of memory blocks allocated to channel n. (R/W)

RMT_IDLE_THRES_CHn In receive mode, when no edge is detected on the input signal for longer than REG_IDLE_THRES_CHn channel clock cycles, the receive process is finished. (R/W)

RMT_DIV_CNT_CHn This register is used to set the divider for the channel clock of channel n. (R/W)

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15 Remote Control Peripheral (RMT)

Register 15.2. RMT_CHnCONF1_REG (n: 0­7) (0x0024+8*n)

RMT_IDLE_OUT_EN_CHn This is the output enable-control bit for channel n in IDLE state. (R/W)

RMT_IDLE_OUT_LV_CHn This bit configures the level of output signals in channel n when the latter is in IDLE state. (R/W)

RMT_REF_ALWAYS_ON_CHn This bit is used to select the channel’s base clock. 1:clk_apb; 0:clk_ref. (R/W)

RMT_REF_CNT_RST_CHn Setting this bit resets the clock divider of channel n. (R/W)

RMT_RX_FILTER_THRES_CHn In receive mode, channel n ignores input pulse when the pulse width is smaller than this value in APB clock periods. (R/W)

RMT_RX_FILTER_EN_CHn This is the receive filter’s enable-bit for channel n. (R/W)

RMT_TX_CONTI_MODE_CHn If this bit is set, instead of going to an idle state when transmission ends, the transmitter will restart transmission. This results in a repeating output signal. (R/W)

RMT_MEM_OWNER_CHn This bit marks channel n’s RAM block ownership. Number 1 indicates that the receiver is using the RAM, while 0 indicates that the transmitter is using the RAM. (R/W)

RMT_MEM_RD_RST_CHn Set this bit to reset the read-RAM address for channel n by accessing the transmitter. (R/W)

RMT_MEM_WR_RST_CHn Set this bit to reset the write-RAM address for channel n by accessing the receiver. (R/W)

RMT_RX_EN_CHn Set this bit to enable receiving data on channel n. (R/W)

RMT_TX_START_CHn Set this bit to start sending data on channel n. (R/W)

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15 Remote Control Peripheral (RMT)

Register 15.3. RMT_INT_RAW_REG (0x00A0)