AT24C01C/AT24C02C
Description
3.Description
The AT24C01C/AT24C02C provides 1,024/2,048 bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 128/256 words of 8 bits each. The device’s cascading feature allows up to eight devices to share a common two wire bus. This device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The device is available in space-saving 8-lead SOIC, 8-lead TSSOP, 8-pad UDFN, 8-lead PDIP, 5-lead SOT23 and 8-ball VFBGA packages. All packages operate from 1.7V to 5.5V.
3.1System Configuration Using Two-Wire Serial EEPROMs
VCC |
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RPUP(max) = |
tR(max) |
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0.8473 x CL |
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RPUP(min) = |
VCC - VOL(max) |
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VCC |
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IOL |
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SCL |
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SDA |
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WP |
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I2C Bus Master: |
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Microcontroller |
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A0 |
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VCC |
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A0 |
VCC |
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A0 |
VCC |
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A1 |
Slave 0 WP |
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A1 |
Slave 1 WP |
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A1 |
Slave 7 WP |
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A2 AT24CXXX SDA |
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A2 AT24CXXX SDA |
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A2 AT24CXXX SDA |
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GND |
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GND |
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SCL |
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GND |
SCL |
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GND |
SCL |
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© 2018 Microchip Technology Inc. |
Datasheet |
DS20006111A-page 7 |
AT24C01C/AT24C02C
Description
3.2Block Diagram
A0 |
Hardware |
Memory |
Power |
VCC |
Address |
On Reset |
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Comparator |
System Control |
Generator |
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Module |
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High Voltage |
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Generation Circuit |
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A1 |
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Write |
WP |
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Protection |
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Control |
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EEPROM Array |
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DecoderRow |
Address Register |
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1 page |
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and Counter |
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A2 |
Column Decoder |
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SCL |
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Data Register |
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Start |
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Data & ACK |
Stop |
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DOUT |
Detector |
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Input/Output Control |
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GND |
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DIN |
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SDA |
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© 2018 Microchip Technology Inc. |
Datasheet |
DS20006111A-page 8 |