- •1 Features
- •2 Applications
- •3 Description
- •Table of Contents
- •4 Revision History
- •5 Device Comparison
- •6 Pin Configuration and Functions
- •7 Specifications
- •7.1 Absolute Maximum Ratings
- •7.2 ESD Ratings
- •7.3 Recommended Operating Conditions
- •7.4 Thermal Information
- •7.5 Electrical Characteristics
- •7.6 System Characteristics
- •7.7 Typical Characteristics
- •8 Detailed Description
- •8.1 Overview
- •8.2 Functional Block Diagram
- •8.3 Feature Description
- •8.3.1 Control Scheme
- •8.3.2 Soft-Start Function
- •8.3.3 Enable and External UVLO Function
- •8.3.4 Current Limit
- •8.3.5 Hiccup Mode
- •8.3.6 Power Good (PGOOD) Function
- •8.3.7 MODE/SYNC Function
- •8.3.7.1 Forced PWM Mode
- •8.3.7.2 Auto PFM Mode
- •8.3.7.3 Dropout Mode
- •8.3.7.4 SYNC Operation
- •8.3.8 Thermal Protection
- •8.4 Device Functional Modes
- •8.4.1 Shutdown
- •8.4.2 FPWM Operation
- •8.4.3 Auto PFM Mode Operation
- •9 Application and Implementation
- •9.1 Application Information
- •9.2 Typical Applications
- •9.2.1.1 Maximum Input Voltage for VOUT < 2.5 V
- •9.2.2 Detailed Design Procedure
- •9.2.2.1 Custom Design With WEBENCH® Tools
- •9.2.2.2 Input Capacitor Selection
- •9.2.2.3 Output Capacitor Selection
- •9.2.2.4 Feedback Voltage Divider for Adjustable Output Voltage Versions
- •9.2.2.5 RPU - PGOOD Pullup Resistor
- •9.2.2.6 VIN Divider and Enable
- •9.2.3 Application Curves
- •9.2.3.1 VOUT = 5 V
- •9.2.3.2 VOUT = 3.3 V
- •9.2.3.3 VOUT = 12 V
- •9.2.3.4 VOUT = 15 V
- •9.2.3.5 VOUT = 2.5 V
- •9.2.3.6 VOUT = 1.2 V and VOUT = 1.8 V
- •9.2.3.7 VOUT = 5 V and 3.3 V Fixed Output Options
- •10 Power Supply Recommendations
- •10.1 Supply Voltage Range
- •10.2 Supply Current Capability
- •10.3 Supply Input Connections
- •10.3.1 Voltage Drops
- •10.3.2 Stability
- •11 Layout
- •11.1 Layout Guidelines
- •11.1.1 Thermal Design
- •11.2 Layout Examples
- •12 Device and Documentation Support
- •12.1 Device Support
- •12.1.1 Third-Party Products Disclaimer
- •12.2 Custom Design With WEBENCH® Tools
- •12.3 Documentation Support
- •12.3.1 Related Documentation
- •12.4 Receiving Notification of Documentation Updates
- •12.5 Community Resources
- •12.6 Trademarks
- •12.7 Electrostatic Discharge Caution
- •12.8 Glossary
- •13 Mechanical, Packaging, and Orderable Information
- •13.1 Tape and Reel Information
LMZM23600
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SNVSB53B –FEBRUARY 2018–REVISED MAY 2019 |
8.4 Device Functional Modes
8.4.1 Shutdown
The LMZM23600 device shuts down most internal circuitry and high-side and low-side power MOSFETs under any of the following conditions:
1.EN is low
2.VIN is below the falling UVLO threshold
3.Junction temperature exceeds TSD threshold
The PGOOD flag remains operational with input voltage as low as 1.5 V.
8.4.2 FPWM Operation
If MODE/SYNC is above the VMODE/SYNC high threshold or a valid synchronizing is applied to MODE/SYNC, constant frequency operation is maintained across load. The ADJ option of the device folds back the frequency
when VIN exceeds 28 V typical so that the output voltage can be properly regulated. See Table 2 for all use cases and options. FPWM mode requires negative current be allowed in the inductor if the load is light. If a large negative load is present, operation is halted by a reverse current limit, IL-NEG.
8.4.3 Auto PFM Mode Operation
If MODE/SYNC is below the VMODE/SYNC low threshold, reverse current in the inductor is not allowed. This feature is called diode emulation. While the load is heavy, the regulator uses PWM mode to control the output. If the load
is light, the control logic transitions to PFM mode. The switching frequency is reduced, resulting in excellent energy savings while regulation is maintained. Because the frequency is reduced and switching pulses can come in groups, the output voltage ripple can increase slightly. Under this condition, the output ripple can be reduced by increasing the output capacitance.
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