- •1 Features
- •2 Applications
- •3 Description
- •Table of Contents
- •4 Revision History
- •5 Device Comparison
- •6 Pin Configuration and Functions
- •7 Specifications
- •7.1 Absolute Maximum Ratings
- •7.2 ESD Ratings
- •7.3 Recommended Operating Conditions
- •7.4 Thermal Information
- •7.5 Electrical Characteristics
- •7.6 System Characteristics
- •7.7 Typical Characteristics
- •8 Detailed Description
- •8.1 Overview
- •8.2 Functional Block Diagram
- •8.3 Feature Description
- •8.3.1 Control Scheme
- •8.3.2 Soft-Start Function
- •8.3.3 Enable and External UVLO Function
- •8.3.4 Current Limit
- •8.3.5 Hiccup Mode
- •8.3.6 Power Good (PGOOD) Function
- •8.3.7 MODE/SYNC Function
- •8.3.7.1 Forced PWM Mode
- •8.3.7.2 Auto PFM Mode
- •8.3.7.3 Dropout Mode
- •8.3.7.4 SYNC Operation
- •8.3.8 Thermal Protection
- •8.4 Device Functional Modes
- •8.4.1 Shutdown
- •8.4.2 FPWM Operation
- •8.4.3 Auto PFM Mode Operation
- •9 Application and Implementation
- •9.1 Application Information
- •9.2 Typical Applications
- •9.2.1.1 Maximum Input Voltage for VOUT < 2.5 V
- •9.2.2 Detailed Design Procedure
- •9.2.2.1 Custom Design With WEBENCH® Tools
- •9.2.2.2 Input Capacitor Selection
- •9.2.2.3 Output Capacitor Selection
- •9.2.2.4 Feedback Voltage Divider for Adjustable Output Voltage Versions
- •9.2.2.5 RPU - PGOOD Pullup Resistor
- •9.2.2.6 VIN Divider and Enable
- •9.2.3 Application Curves
- •9.2.3.1 VOUT = 5 V
- •9.2.3.2 VOUT = 3.3 V
- •9.2.3.3 VOUT = 12 V
- •9.2.3.4 VOUT = 15 V
- •9.2.3.5 VOUT = 2.5 V
- •9.2.3.6 VOUT = 1.2 V and VOUT = 1.8 V
- •9.2.3.7 VOUT = 5 V and 3.3 V Fixed Output Options
- •10 Power Supply Recommendations
- •10.1 Supply Voltage Range
- •10.2 Supply Current Capability
- •10.3 Supply Input Connections
- •10.3.1 Voltage Drops
- •10.3.2 Stability
- •11 Layout
- •11.1 Layout Guidelines
- •11.1.1 Thermal Design
- •11.2 Layout Examples
- •12 Device and Documentation Support
- •12.1 Device Support
- •12.1.1 Third-Party Products Disclaimer
- •12.2 Custom Design With WEBENCH® Tools
- •12.3 Documentation Support
- •12.3.1 Related Documentation
- •12.4 Receiving Notification of Documentation Updates
- •12.5 Community Resources
- •12.6 Trademarks
- •12.7 Electrostatic Discharge Caution
- •12.8 Glossary
- •13 Mechanical, Packaging, and Orderable Information
- •13.1 Tape and Reel Information
LMZM23600
SNVSB53B –FEBRUARY 2018–REVISED MAY 2019 |
www.ti.com |
Feature Description (continued)
8.3.7.4 SYNC Operation
It is often desirable to synchronize the switching frequency of multiple regulators in a single system. This technique results in better defined EMI behavior and can reduce the need for capacitance on some power rails. The LMZM23600 MODE/SYNC input allows synchronization to an external clock. The LMZM23600 implements an in-phase locking scheme – the rising edge of the clock signal provided to the input of the LMZM23600 device corresponds to turning on the high-side MOSFET device. This function is implemented using phase locking over a limited frequency range eliminating large glitches upon initial application of an external clock. The clock fed into the LMZM23600 device replaces the internal free-running clock but does not affect frequency foldback operation. The foldback function takes over and the output voltage continues to be well regulated using frequency reduction when duty factors outside of the normal duty cycle range are reached. When the device is synchronized to the lower end of the synchronization range the internal inductor will see higher peak currents. For high current ripple designs (for example, high input voltage and 12-V and 15-V output designs), the maximum current capability of the device may be derated.
The device remains in FPWM mode and operates in CCM for light loads when synchronization input is provided.
The MODE/SYNC function logic always prioritizes the proper regulation of the output voltage. Table 2 summarizes the MODE/SYNC function and the operating switching frequency with various conditions. See Typical Characteristics for frequency foldback vs input voltage behavior.
Table 2. Switching Frequency and MODE/SYNC Function
DEVICE |
|
|
SWITCHING FREQUENCY |
|
||
MODE/SYNC |
LIGHT LOAD |
FULL LOAD |
VIN > 28 V |
IN DROPOUT MODE |
||
|
||||||
|
Logic LOW = Auto PFM |
Reduced |
Fixed |
Reduced |
Reduced |
|
|
(save power) |
1000 kHz |
(maintain regulation) |
(maintain regulation) |
||
|
|
|||||
ADJ Output |
Logic HIGH = FPWM |
Fixed |
Fixed |
Reduced |
Reduced |
|
1000 kHz |
1000 kHz |
(maintain regulation) |
(maintain regulation) |
|||
|
|
|||||
|
Valid FSYNC Input |
FSYNC |
FSYNC |
Reduced |
Reduced |
|
|
(maintain regulation) |
(maintain regulation) |
||||
Fixed |
Logic LOW = Auto PFM |
Reduced |
Fixed |
Fixed |
Reduced |
|
(save power) |
750 kHz |
750 kHz |
(maintain regulation) |
|||
|
||||||
3.3-V |
|
|
|
|
|
|
|
Fixed |
Fixed |
Fixed |
Reduced |
||
Output |
Logic HIGH = FPWM |
|||||
750 kHz |
750 kHz |
750 kHz |
(maintain regulation) |
|||
or 5-V |
|
|||||
|
|
|
|
Reduced |
||
Output |
Valid FSYNC Input |
FSYNC |
FSYNC |
FSYNC |
||
|
(maintain regulation) |
|||||
8.3.8 Thermal Protection
The LMZM23600 monitors its junction temperature (TJ) and shuts off if the it gets too hot. The thermal shutdown threshold for the junction is typically 155°C. Both, high-side and low-side power MOSFETs are turned off until the junction temperature has decreased under the hysteresis level, typically 15°C below the shutdown temperature.
20 |
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