13.3.6Alternate Functions of Port F

The Port F has an alternate function as analog input for the ADC as shown in Table 13-18. If some Port F pins are configured as outputs, it is essential that these do not switch when a conversion is in progress. This might corrupt the result of the conversion. If the JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even if a Reset occurs.

Table 13-18. Port F Pins Alternate Functions

• TDI, ADC7 – Port F, Bit 7

ADC7, Analog to Digital Converter, Channel 7.

TDI, JTAG Test Data In: Serial input data to be shifted in to the Instruction Register or Data Register (scan chains). When the JTAG interface is enabled, this pin can not be used as an I/O pin.

• TDO, ADC6 – Port F, Bit 6

ADC6, Analog to Digital Converter, Channel 6.

TDO, JTAG Test Data Out: Serial output data from Instruction Register or Data Register. When the JTAG interface is enabled, this pin can not be used as an I/O pin.

The TDO pin is tri-stated unless TAP states that shift out data are entered.

• TMS, ADC5 – Port F, Bit 5

ADC5, Analog to Digital Converter, Channel 5.

TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin.

• TCK, ADC4 – Port F, Bit 4

ADC4, Analog to Digital Converter, Channel 4.

TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG interface is enabled, this pin can not be used as an I/O pin.

• ADC3 – ADC0 – Port F, Bit 3:0

Analog to Digital Converter, Channel 3:0.

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Table 13-19. Overriding Signals for Alternate Functions in PF7:PF4

Table 13-20. Overriding Signals for Alternate Functions in PF3:PF0

13.3.7Alternate Functions of Port G

The Port G alternate pin configuration is as follows:

Table 13-21. Port G Pins Alternate Functions

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• OC0B – Port G, Bit 5

OC0B, Output Compare match B output: The PG5 pin can serve as an external output for the TImer/Counter0 Output Compare. The pin has to be configured as an output (DDG5 set) to serve this function. The OC0B pin is also the output pin for the PWM mode timer function.

• TOSC1 – Port G, Bit 4

TOSC2, Timer Oscillator pin 1: When the AS2 bit in ASSR is set (one) to enable asynchronous clocking of Timer/Counter2, pin PG4 is disconnected from the port, and becomes the input of the inverting Oscillator amplifier. In this mode, a Crystal Oscillator is connected to this pin, and the pin can not be used as an I/O pin.

• TOSC2 – Port G, Bit 3

TOSC2, Timer Oscillator pin 2: When the AS2 bit in ASSR is set (one) to enable asynchronous clocking of Timer/Counter2, pin PG3 is disconnected from the port, and becomes the inverting output of the Oscillator amplifier. In this mode, a Crystal Oscillator is connected to this pin, and the pin can not be used as an I/O pin.

• ALE – Port G, Bit 2

ALE is the external data memory Address Latch Enable signal.

• RD – Port G, Bit 1

RD is the external data memory read control strobe.

• WR – Port G, Bit 0

WR is the external data memory write control strobe.

Table 13-22 on page 87 and Table 13-23 on page 88 relates the alternate functions of Port G to the overriding signals shown in Figure 13-5 on page 73.

Table 13-22. Overriding Signals for Alternate Functions in PG5:PG4

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Table 13-23. Overriding Signals for Alternate Functions in PG3:PG0

13.3.8Alternate Functions of Port H

The Port H alternate pin configuration is as follows:

Table 13-24. Port H Pins Alternate Functions

• T4 – Port H, Bit 7

T4, Timer/Counter4 counter source.

• OC2B – Port H, Bit 6

OC2B, Output Compare Match B output: The PH6 pin can serve as an external output for the Timer/Counter2 Output Compare B. The pin has to be configured as an output (DDH6 set) to serve this function. The OC2B pin is also the output pin for the PWM mode timer function.

• OC4C – Port H, Bit 5

OC4C, Output Compare Match C output: The PH5 pin can serve as an external output for the Timer/Counter4 Output Compare C. The pin has to be configured as an output (DDH5 set) to serve this function. The OC4C pin is also the output pin for the PWM mode timer function.

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• OC4B – Port H, Bit 4

OC4B, Output Compare Match B output: The PH4 pin can serve as an external output for the Timer/Counter2 Output Compare B. The pin has to be configured as an output (DDH4 set) to serve this function. The OC4B pin is also the output pin for the PWM mode timer function.

• OC4A – Port H, Bit 3

OC4C, Output Compare Match A output: The PH3 pin can serve as an external output for the Timer/Counter4 Output Compare A. The pin has to be configured as an output (DDH3 set) to serve this function. The OC4A pin is also the output pin for the PWM mode timer function.

• XCK2 – Port H, Bit 2

XCK2, USART2 External Clock: The Data Direction Register (DDH2) controls whether the clock is output (DDH2 set) or input (DDH2 cleared). The XC2K pin is active only when the USART2 operates in synchronous mode.

•TXD2 – Port H, Bit 1

TXD2, USART2 Transmit Pin.

•RXD2 – Port H, Bit 0

RXD2, USART2 Receive pin: Receive Data (Data input pin for the USART2). When the USART2 Receiver is enabled, this pin is configured as an input regardless of the value of DDH0. When the USART2 forces this pin to be an input, a logical on in PORTH0 will turn on the internal pull-up.

Table 13-25. Overriding Signals for Alternate Functions in PH7:PH4

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