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Figure 30-16. State Machine Sequence for Changing/Reading the Data Word

1 Test-Logic-Reset

 

0

 

 

 

 

 

 

 

 

0

 

 

1

 

 

 

 

 

1

 

Run-Test/Idle

 

Select-DR Scan

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

1

 

 

 

 

1

 

 

 

 

Capture-DR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift-DR

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

Exit1-DR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pause-DR

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

0

 

 

 

 

 

0

 

 

 

 

Exit2-DR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Update-DR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

1

Select-IR Scan

0

Capture-IR

 

0

 

Shift-IR

0

1

 

Exit1-IR

1

 

0

 

Pause-IR

0

1

 

Exit2-IR

 

1

 

Update-IR

 

1

0

30.9.11Flash Data Byte Register

The Flash Data Byte Register provides an efficient way to load the entire Flash page buffer before executing Page Write, or to read out/verify the content of the Flash. A state machine sets up the control signals to the Flash and senses the strobe signals from the Flash, thus only the data words need to be shifted in/out.

The Flash Data Byte Register actually consists of the 8-bit scan chain and a 8-bit temporary register. During page load, the Update-DR state copies the content of the scan chain over to the temporary register and initiates a write sequence that within 11 TCK cycles loads the content of the temporary register into the Flash page buffer. The AVR automatically alternates between writing the low and the high byte for each new Update-DR state, starting with the low byte for the first Update-DR encountered after entering the PROG_PAGELOAD command. The Program Counter is pre-incremented before writing the low byte, except for the first written byte. This ensures that the first data is written to the address set up by PROG_COMMANDS, and loading the last location in the page buffer does not make the Program Counter increment into the next page.

During Page Read, the content of the selected Flash byte is captured into the Flash Data Byte Register during the Capture-DR state. The AVR automatically alternates between reading the low and the high byte for each new Cap- ture-DR state, starting with the low byte for the first Capture-DR encountered after entering the PROG_PAGEREAD command. The Program Counter is post-incremented after reading each high byte, including the first read byte. This ensures that the first data is captured from the first address set up by PROG_COMMANDS, and reading the last location in the page makes the program counter increment into the next page.

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Figure 30-17. Flash Data Byte Register

STROBES

State

Machine

TDI

ADDRESS

Flash

EEPROM

Fuses

Lock Bits

D

A

T

A

TDO

The state machine controlling the Flash Data Byte Register is clocked by TCK. During normal operation in which eight bits are shifted for each Flash byte, the clock cycles needed to navigate through the TAP controller automatically feeds the state machine for the Flash Data Byte Register with sufficient number of clock pulses to complete its operation transparently for the user. However, if too few bits are shifted between each Update-DR state during page load, the TAP controller should stay in the Run-Test/Idle state for some TCK cycles to ensure that there are at least 11 TCK cycles between each Update-DR state.

30.9.12Programming Algorithm

All references below of type “1a”, “1b”, and so on, refer to Table 30-18 on page 347.

30.9.13Entering Programming Mode

1.Enter JTAG instruction AVR_RESET and shift 1 in the Reset Register.

2.Enter instruction PROG_ENABLE and shift 0b1010_0011_0111_0000 in the Programming Enable Register.

30.9.14Leaving Programming Mode

1.Enter JTAG instruction PROG_COMMANDS.

2.Disable all programming instructions by using no operation instruction 11a.

3.Enter instruction PROG_ENABLE and shift 0b0000_0000_0000_0000 in the programming Enable Register.

4.Enter JTAG instruction AVR_RESET and shift 0 in the Reset Register.

30.9.15Performing Chip Erase

1.Enter JTAG instruction PROG_COMMANDS.

2.Start Chip Erase using programming instruction 1a.

3.Poll for Chip Erase complete using programming instruction 1b, or wait for tWLRH_CE (refer to Table 30-14 on page 338).

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30.9.16Programming the Flash

Before programming the Flash a Chip Erase must be performed, see “Performing Chip Erase” on page 351.

1.Enter JTAG instruction PROG_COMMANDS.

2.Enable Flash write using programming instruction 2a.

3.Load address Extended High byte using programming instruction 2b.

4.Load address High byte using programming instruction 2c.

5.Load address Low byte using programming instruction 2d.

6.Load data using programming instructions 2e, 2f and 2g.

7.Repeat steps 5 and 6 for all instruction words in the page.

8.Write the page using programming instruction 2h.

9.Poll for Flash write complete using programming instruction 2i, or wait for tWLRH (refer to Table 30-14 on page 338).

10.Repeat steps 3 to 9 until all data have been programmed.

A more efficient data transfer can be achieved using the PROG_PAGELOAD instruction:

1.Enter JTAG instruction PROG_COMMANDS.

2.Enable Flash write using programming instruction 2a.

3.Load the page address using programming instructions 2b, 2c and 2d. PCWORD (refer to Table 30-7 on page 328) is used to address within one page and must be written as 0.

4.Enter JTAG instruction PROG_PAGELOAD.

5.Load the entire page by shifting in all instruction words in the page byte-by-byte, starting with the LSB of the first instruction in the page and ending with the MSB of the last instruction in the page. Use Update-DR to copy the contents of the Flash Data Byte Register into the Flash page location and to auto-increment the Program Counter before each new word.

6.Enter JTAG instruction PROG_COMMANDS.

7.Write the page using programming instruction 2h.

8.Poll for Flash write complete using programming instruction 2i, or wait for tWLRH (refer to Table 30-14 on page 338).

9.Repeat steps 3 to 8 until all data have been programmed.

30.9.17Reading the Flash

1.Enter JTAG instruction PROG_COMMANDS.

2.Enable Flash read using programming instruction 3a.

3.Load address using programming instructions 3b, 3c and 3d.

4.Read data using programming instruction 3e.

5.Repeat steps 3 and 4 until all data have been read.

A more efficient data transfer can be achieved using the PROG_PAGEREAD instruction:

1.Enter JTAG instruction PROG_COMMANDS.

2.Enable Flash read using programming instruction 3a.

3.Load the page address using programming instructions 3b, 3c and 3d. PCWORD (refer to Table 30-7 on page 328) is used to address within one page and must be written as 0.

4.Enter JTAG instruction PROG_PAGEREAD.

5.Read the entire page (or Flash) by shifting out all instruction words in the page (or Flash), starting with the LSB of the first instruction in the page (Flash) and ending with the MSB of the last instruction in the page (Flash). The Capture-DR state both captures the data from the Flash, and also auto-increments the program counter after each word is read. Note that Capture-DR comes before the shift-DR state. Hence, the first byte which is shifted out contains valid data.

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6.Enter JTAG instruction PROG_COMMANDS.

7.Repeat steps 3 to 6 until all data have been read.

30.9.18Programming the EEPROM

Before programming the EEPROM a Chip Erase must be performed, see “Performing Chip Erase” on page 351.

1.Enter JTAG instruction PROG_COMMANDS.

2.Enable EEPROM write using programming instruction 4a.

3.Load address High byte using programming instruction 4b.

4.Load address Low byte using programming instruction 4c.

5.Load data using programming instructions 4d and 4e.

6.Repeat steps 4 and 5 for all data bytes in the page.

7.Write the data using programming instruction 4f.

8.Poll for EEPROM write complete using programming instruction 4g, or wait for tWLRH (refer to Table 30-14 on page 338).

9.Repeat steps 3 to 8 until all data have been programmed.

Note that the PROG_PAGELOAD instruction can not be used when programming the EEPROM.

30.9.19Reading the EEPROM

1.Enter JTAG instruction PROG_COMMANDS.

2.Enable EEPROM read using programming instruction 5a.

3.Load address using programming instructions 5b and 5c.

4.Read data using programming instruction 5d.

5.Repeat steps 3 and 4 until all data have been read.

Note that the PROG_PAGEREAD instruction can not be used when reading the EEPROM.

30.9.20Programming the Fuses

1.Enter JTAG instruction PROG_COMMANDS.

2.Enable Fuse write using programming instruction 6a.

3.Load data high byte using programming instructions 6b. A bit value of “0” will program the corresponding fuse, a “1” will unprogram the fuse.

4.Write Fuse High byte using programming instruction 6c.

5.Poll for Fuse write complete using programming instruction 6d, or wait for tWLRH (refer to Table 30-14 on page 338).

6.Load data low byte using programming instructions 6e. A “0” will program the fuse, a “1” will unprogram the fuse.

7.Write Fuse low byte using programming instruction 6f.

8.Poll for Fuse write complete using programming instruction 6g, or wait for tWLRH (refer to Table 30-14 on page 338).

30.9.21Programming the Lock Bits

1.Enter JTAG instruction PROG_COMMANDS.

2.Enable Lock bit write using programming instruction 7a.

3.Load data using programming instructions 7b. A bit value of “0” will program the corresponding lock bit, a “1” will leave the lock bit unchanged.

4.Write Lock bits using programming instruction 7c.

5.Poll for Lock bit write complete using programming instruction 7d, or wait for tWLRH (refer to Table 30-14 on page 338).

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