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DISCRETE SEMICONDUCTORS

PHN110

N-channel enhancement mode MOS transistor

Product speciﬁcation

1996 Apr 02

Supersedes data of November 1994

File under Discrete Semiconductors, SC07

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode

PHN110

MOS transistor

FEATURES

∙High speed switching

∙No secondary breakdown

∙Very low on-resistance.

DESCRIPTION

N-channel enhancement mode MOS transistor in an 8-pin plastic SO8 (SOT96-1) package.

APPLICATIONS

∙Motor and actuator driver

∙Power management

∙Synchronized rectifying.

PINNING - SO8 (SOT96-1)

PIN	SYMBOL	DESCRIPTION

1	n.c	not connected
2	s	source
3	s	source
4	g	gate
5	d	drain
6	d	drain
7	d	drain
8	d	drain

handbook, halfpage		d	d d	d
8	5
1	4
	MAM116	n.c. s	s	g

Fig.1 Simplified outline and symbol.

CAUTION

The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling.

QUICK REFERENCE DATA

SYMBOL	PARAMETER	CONDITIONS		MIN.	MAX.	UNIT

VDS	drain-source voltage (DC)		−		30	V
VSD	source-drain diode forward voltage	IS = 1.25 A	−		1.2	V
VGS	gate-source voltage (DC)		−		±20	V
VGSth	gate-source threshold voltage	ID = 1 mA; VDS = VGS	1		2.8	V
ID	drain current (DC)	Ts = 80 °C	−		4	A
RDSon	drain-source on-state resistance	ID = 2.2 A; VGS = 10 V	−		0.1	Ω
Ptot	total power dissipation	Ts = 80 °C	−		2.8	W

1996 Apr 02

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode

PHN110

MOS transistor

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT

VDS	drain-source voltage (DC)		−	30	V
VGS	gate-source voltage (DC)		−	±20	V
ID	drain current (DC)	Ts = 80 °C; note 1	−	4	A
IDM	peak drain current	note 2	−	16	A
Ptot	total power dissipation	Ts = 80 °C	−	2.8	W
		Tamb = 25 °C; note 3	−	2.4	W
		Tamb = 25 °C; note 4	−	1.1	W
Tstg	storage temperature		−65	+150	°C
Tj	operating junction temperature		−65	+150	°C
Source-drain diode

IS	source current (DC)	Ts = 80 °C	−	3.5	A
ISM	peak pulsed source current	note 2	−	14	A

Notes

1.Ts is the temperature at the soldering point of the drain lead.

2.Pulse width and duty cycle limited by maximum junction temperature.

3.Value based on PCB with a Rth a-tp (ambient to tie-point) of 27.5 K/W.

4.Value based on PCB with a Rth a-tp (ambient to tie-point) of 90 K/W.

6					MBG848	102			MBG750
6						102
handbook, halfpage						handbook, halfpage
Ptot						ID
Ptot						(A)
(W)						10
						10			tp =
						(1)			tp =
4									10 μs
									100 μs
						1			1 ms
						P	t p		10 ms
2						P	δ =
2							T	DC	100 ms
						10−1			100 ms


						t p	t
						T
0						10−2				102
0	50	100	150 T	s	(oC) 200	10−1	1	10	VDS (V)	102
0	50	100	150 T		(oC) 200				VDS (V)

δ = 0.01; TS = 80 °C.

(1) RDSon limitation.

Fig.2 Power derating curve.

Fig.3 DC SOAR.

1996 Apr 02

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode

PHN110

MOS transistor

THERMAL CHARACTERISTICS

SYMBOL	PARAMETER	VALUE	UNIT

Rth j-s	thermal resistance from junction to soldering point	25	K/W

102						MBG749
102
handbook, full pagewidth
Rth j−s
(K/W)	δ =
	δ =
	0.75
10	0.5
10	0.33
	0.33
	0.2
	0.1
	0.05
1	0.02				P	t p
	0.02				P	δ =
						T
	0.01
	0				t p	t
					t p	t
						T
10−1
10−6	10−5	10−4	10−3	10−2	10−1	tp (s)	1

Fig.4 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values

1996 Apr 02

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode

PHN110

MOS transistor

CHARACTERISTICS

Tj = 25 °C unless otherwise speciﬁed.

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT

V(BR)DSS	drain-source breakdown voltage	VGS = 0; ID = 10 μA	30	−	−	V
VGSth	gate-source threshold voltage	VGS = VDS; ID = 1 mA	1	−	2.8	V
IDSS	drain-source leakage current	VGS = 0; VDS = 24 V	−	−	100	nA
IGSS	gate leakage current	VGS = ±20 V; VDS = 0	−	−	±100	nA
RDSon	drain-source on-state resistance	VGS = 4.5 V; ID = 1 A	−	0.11	0.2	Ω
		VGS = 10 V; ID = 2 A	−	0.08	0.1	Ω
Ciss	input capacitance	VGS = 0; VDS = 24 V; f = 1 MHz	−	250	−	pF
Coss	output capacitance	VGS = 0; VDS = 24 V; f = 1 MHz	−	140	−	pF
Crss	reverse transfer capacitance	VGS = 0; VDS = 24 V; f = 1 MHz	−	50	−	pF
Qg	total gate charge	VGS = 10 V; VDD = 15 V; ID = 2 A	−	10	30	nC
Qgs	gate-source charge	VGS = 10 V; VDD = 15 V; ID = 2 A	−	1	−	nC
Qgd	gate-drain charge	VGS = 10 V; VDD = 15 V; ID = 2 A	−	2.5	−	nC
Switching times (see Fig 11)

td(on)	turn-on delay time	VGS = 0 to 10 V; VDD = 15 V;	−	4.5	−	ns
		ID = 1 A; RL = 15 Ω; Rgen = 6 Ω
tf	fall time	ID = 1 A; RL = 15 Ω; Rgen = 6 Ω	−	3.5	−	ns
ton	turn-on switching time		−	8	16	ns
td(off)	turn-off delay time	VGS = 10 to 0 V; VDD = 15 V;	−	15	−	ns
		ID = 1 A; RL = 15 Ω; Rgen = 6 Ω
tr	rise time	ID = 1 A; RL = 15 Ω; Rgen = 6 Ω	−	10	−	ns
toff	turn-off switching time		−	25	50	ns
Source-drain diode

VSD	source-drain diode forward voltage	VGS = 0; IS = 1.25 A	−	−	1.2	V
trr	reverse recovery time	IS = 1.25 A; di/dt = −100 A/μs	−	35	100	ns

1996 Apr 02

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode

PHN110

MOS transistor

10				MBE136
10
handbook, halfpage
VGS
(V)
8
6
4
2
0
0	2	4	6	Q g (nC) 8
VDD = 15 V: ID = 2 A.

Fig.5 Gate-source voltage as a function of total gate charge; typical values.

MBG748

18 handbook, halfpage

ID	VGS =
(A)	VGS =
(A)	10 V	6 V
16	10 V	6 V
16
			5.5 V
12						4.5 V
12
						4 V
8
						3.5 V
4
						3 V
						2.5 V
0	0	2	4	6	8	10
	0	2	4	6	8	10
						VDS (V)

Tj = 25 °C.

Fig.6 Output characteristics; typical values.

MBG747

16 handbook, halfpage

(A)

6 VGS (V) 8

VDS = 10 V; Tj = 25 °C.

Fig.7 Transfer characteristics; typical values.

MBG746

16 handbook, halfpage

(A)

(1)

(2)

(3)

0	0.4	0.8	VSD (V)	1.2
			VSD (V)

VGD = 0.

(1)Tj = 150 °C.

(2)Tj = 25 °C.

(3)Tj = −65 °C.

Fig.8 Source current as a function of source-drain diode forward voltage; typical values.

1996 Apr 02

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode

PHN110

MOS transistor

103	MBG846
103
handbook, halfpage	ID= 100 mA
	ID= 100 mA
	500 mA
	1 A
RDSon	2 A
(mW)	4 A
	5.4 A
102

10
10				8
0	2	4	6	8	10
					VGS (V)
VDS ³ ID ´ RDSon; Tj = 25 °C.
Fig.9	Drain-source on-resistance as a function of
	gate-source voltage; typical values.

MBG847

600 handbook, halfpage

C (pF)

400

Ciss

200

Coss

Crss

0	8	16	VDS (V)	24
			VDS (V)

VGS = 0; f = 1 MHz; Tj = 25 °C.

Fig.10 Capacitance as a function of drain-source voltage; typical values.

handbook, full pagewidth		90 %
VDD		90 %
VDD
	Vin
RL	0	10 %
	0
	Vout	90 %
		90 %
Vin	Vout
Vin		10 %
	0	10 %
	0
		td(on)	td(off)
		tf		tr
		ton	toff	MBH538
		ton	toff

Fig.11 Switching time test circuit and input and output waveforms.

1996 Apr 02

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode											PHN110
MOS transistor											PHN110
MOS transistor
1.2					MBG745	1.8					MBG744
1.2						1.8
handbook, halfpage						handbook, halfpage
k						k
1.1						1.6
										(1)
1.0						1.4
										(2)
0.9						1.2
0.8						1.0
0.7						0.8
0.6	−25					0.6	−25
−75	−25	25	75	125	175	−75	−25	25	75	125	175
				Tj (oC)						Tj (oC)
						RDSon	at Tj	Typical RDSon at:
						k = -----------------------------------------		Typical RDSon at:
VGSth	at Tj					RDSon at 25 °C
k = --------------------------------------						(1) ID = 2 A; VGS = 10 V.
VGSth at 25°C						(1) ID = 2 A; VGS = 10 V.
Typical VGSth at VDS =VGS; ID = 1 mA.						(2) ID = 1 A; VGS = 4.5 V.

Fig.12 Temperature coefficient of gate-source	Fig.13 Temperature coefficient of drain-source
threshold voltage; typical values.	on-resistance; typical values.

1996 Apr 02

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode

PHN110

MOS transistor

PACKAGE OUTLINE

	5.0	4.0
handbook, full pagewidth		3.8	A
	4.8



				6.2



S	0.1	S
S	0.1	S	5.8
			5.8

0.7

0.3

8		5		0.7
		1.45		0.6	0.25	1.75
		1.25			0.19	1.35
1		4	0.25	1.0	0 to 8o
			0.25	0.5
pin 1			0.10	0.5
pin 1			0.10
index
				detail A	MBC180 - 1
1.27	0.49	0.25 M
	0.36	0.25 M
	0.36	(8x)
		(8x)

Dimensions in mm.

Fig.14 Plastic small outline package; 8 leads; body width 3.9 mm; SO8 (SOT96-1).

1996 Apr 02

Philips Semiconductors	Product speciﬁcation

N-channel enhancement mode

PHN110

MOS transistor

DEFINITIONS

Data Sheet Status

Objective speciﬁcation	This data sheet contains target or goal speciﬁcations for product development.

Preliminary speciﬁcation	This data sheet contains preliminary data; supplementary data may be published later.

Product speciﬁcation	This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

1996 Apr 02

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