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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order this document by BUV48/D

SWITCHMODE II Series

NPN Silicon Power Transistors

The BUV48/BUV48A transistors are designed for high±voltage, high±speed, power switching in inductive circuits where fall time is critical. They are particularly suited for line±operated switchmode applications such as:

•Switching Regulators

•Inverters

•Solenoid and Relay Drivers

• Motor Controls

• Deflection Circuits

Fast Turn±Off Times

60 ns Inductive Fall Time Ð 25 _C (Typ)

120 ns Inductive Crossover Time Ð 25 _C (Typ)

Operating Temperature Range ±65 to +175_C

100_C Performance Specified for: Reverse±Biased SOA with Inductive Loads Switching Times with Inductive Loads Saturation Voltage

Leakage Currents (125_C)

MAXIMUM RATINGS

BUV48

BUV48A

15 AMPERES

NPN SILICON

POWER TRANSISTORS 400 AND 450 VOLTS

V(BR)CEO

850 ± 1000 VOLTS

V(BR)CEX

150 WATTS

CASE 340D±01

TO±218 TYPE

Rating	Symbol	BUV48		BUV48A	Unit

Collector±Emitter Voltage	VCEO(sus)	400		450	Vdc
Collector±Emitter Voltage (VBE = ±1.5 V)	VCEX	850		1000	Vdc
Emitter Base Voltage	VEB		7		Vdc
Collector Current Ð Continuous	IC		15		Adc
Ð Peak (1)	ICM		30
Ð Overload	IOI		60
Base Current Ð Continuous	IB		5		Adc
Ð Peak (1)	IBM		20
Total Power Dissipation Ð T C = 25_C	PD		150		Watts
Ð T C = 100_C			75
Derate above 25_C			1		W/_C

Operating and Storage Junction Temperature Range	TJ, Tstg	± 65 to +175			_C

THERMAL CHARACTERISTICS

Characteristic	Symbol	Max	Unit

Thermal Resistance, Junction to Case	RqJC	1	_C/W
Maximum Lead Temperature for Soldering Purposes:	TL	275	_C
1/8″ from Case for 5 Seconds

(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle v 10%.
SWITCHMODE is a trademark of Motorola, Inc.
REV 7

Motorola, Inc. 1995

BUV48 BUV48A

ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)

Characteristic

Symbol

Min

Typ

Max

Unit

OFF CHARACTERISTICS (1)

Collector±Emitter Sustaining Voltage (Table 1)

VCEO(sus)

Vdc

(IC = 200 mA, IB = 0) L = 25 mH

BUV48

400

BUV48A

450

Collector Cutoff Current

ICEX

mAdc

(VCEX = Rated Value, VBE(off) = 1.5 Vdc)

0.2

(VCEX = Rated Value, VBE(off) = 1.5 Vdc, TC = 125_C)

Collector Cutoff Current

ICER

mAdc

(VCE = Rated VCEX, RBE = 10 Ω)

TC = 25_C

0.5

TC = 125_C

Emitter Cutoff Current

IEBO

0.1

mAdc

(VEB = 5 Vdc, IC = 0)

Emitter±Base Breakdown Voltage

V(BR)EBO

Vdc

(IE = 50 mA ± IC = 0)

SECOND BREAKDOWN

Second Breakdown Collector Current with Base Forward Biased

IS/b

See Figure 12

Clamped Inductive SOA with Base Reverse Biased

RBSOA

See Figure 13

ON CHARACTERISTICS (1)

DC Current Gain

hFE

(IC = 10 Adc, VCE = 5 Vdc)

BUV48

(IC = 8 Adc, VCE = 5 Vdc)

BUV48A

Collector±Emitter Saturation Voltage

VCE(sat)

Vdc

(IC = 10 Adc, IB = 2 Adc)

1.5

(IC = 15 Adc, IB = 3 Adc)

BUV48

(IC = 10 Adc, IB = 2 Adc, TC = 100_C)

(IC = 8 Adc, IB = 1.6 Adc)

1.5

(IC = 12 Adc, IB = 2.4 Adc)

BUV48A

(IC = 8 Adc, IB = 1.6 Adc, TC = 100_C)

Base±Emitter Saturation Voltage

VBE(sat)

Vdc

(IC = 10 Adc, IB = 2 Adc)

BUV48

1.6

(IC = 10 Adc, IB = 2 Adc, TC = 100_C)

1.6

(IC = 8 Adc, IB = 1.6 Adc)

BUV48A

1.6

(IC = 8 Adc, IB = 1.6 Adc, TC = 100_C)

1.6

DYNAMIC CHARACTERISTICS

Output Capacitance

Cob

350

(VCB = 10 Vdc, IE = 0, ftest = 1 MHz)

SWITCHING CHARACTERISTICS

Resistive Load (Table 1)

Delay Time

IC = 10 A, IB, = 2 A

BUV48

0.1

0.2

μs

Rise Time

0.4

0.7

IC = 8 A, IB, = 1.6 A

BUV48A

Storage Time

Duty Cycle v 2%, VBE(off) = 5 V

1.3

Tp = 30 μs, VCC = 300 V

Fall Time

0.2

0.4

Inductive Load, Clamped (Table 1)

Storage Time

IC = 10 A

BUV48

(TC = 25_C)

tsv

1.3

μs

Fall Time

tfi

0.06

I = 2 A

Storage Time

IC = 8 A

BUV48A

tsv

1.5

2.5

Crossover Time

(TC = 100_C)

0.3

0.6

IB1 = 1.6 A

Fall Time

tfi

0.17

0.35

(1) Pulse Test: Pulse Width = 300 μs, Duty Cycle v 2%.

Vcl = 300 V, VBE(off) = 5 V, Lc = 180 μH

2	Motorola Bipolar Power Transistor Device Data

hFE, DC CURRENT GAIN

												BUV48		BUV48A
							DC CHARACTERISTICS
50			90%					(VOLTS)	10
30								(VOLTS)

									5
								VOLTAGE	5
20								VOLTAGE	3
20
			10%
			10%								7.5 A	10 A	15 A
											7.5 A	10 A	15 A
10								COLLECTOR±EMITTER,		IC = 5 A
7								COLLECTOR±EMITTER,	1
7									1
5
3									0.5
3									0.3
2									0.3
2
1	VCE = 5 V							CE	0.1	TC = 25°C
								CE
	2	3	5	8	10	20	30	V		0.3	0.5	1	2	3	4
1	2	3	5	8	10	20	30	50	0.1	0.3	0.5	1	2	3	4
		IC, COLLECTOR CURRENT (AMPS)								IB, BASE CURRENT (AMPS)

Figure 1. DC Current Gain

Figure 2. Collector Saturation Region

VCE, COLLECTOR±EMITTER VOLTAGE (VOLTS)

5	βf = 5										βf = 5
2	βf = 5				90%				(VOLTS)	2	βf = 5
2					90%				(VOLTS)	2
3									VOLTAGE
1							10%		VOLTAGE	1		TJ = 25°C
0.7									BASE±EMITTER,	0.7			TJ = 100°C
0.7										0.7
0.5										0.5
0.5										0.5
0.3										0.3
0.2									BE
									BE
									V
0.1	2	3	5	7	10	20	30	50		0.1	0.3	1	3	10
1	2	3	5	7	10	20	30	50		0.1	0.3	1	3	10
		IC, COLLECTOR CURRENT (AMPS)										IC, COLLECTOR CURRENT (AMPS)

Figure 3. Collector±Emitter Saturation Voltage

Figure 4. Base±Emitter Voltage

	104
μA)			VCE = 250 V
μA)	103
(								CAPACITANCEC,(pF)
CURRENTCOLLECTOR	102		TJ = 150°C					CAPACITANCEC,(pF)
			TJ = 150°C
			125°C
			125°C
	101	100°C		REVERSE		FORWARD
	101			REVERSE		FORWARD
C	0		75°C
C	0
,	10
I	10
			25°C
	10±1			± 0.2	0	0.2	0.4	0.6
	± 0.4			± 0.2	0	0.2	0.4	0.6
				VBE, BASE±EMITTER VOLTAGE (VOLTS)

10 k
1 k	Cib












100			C	ob
				ob







10	TJ	= 25°C

	10		100		1000
1	10		100		1000

VR, REVERSE VOLTAGE (VOLTS)

Figure 5. Collector Cutoff Region

Figure 6. Capacitance

Motorola Bipolar Power Transistor Device Data

BUV48 BUV48A

Table 1. Test Conditions for Dynamic Performance

VCEO(sus)

RBSOA AND INDUCTIVE SWITCHING

RESISTIVE SWITCHING

22 μF

+10 V

INPUT CONDITIONS

2N6438

TURN±ON TIME

2 W

+10 V

160

MR854

220

100

MM3735

680 pF

Ib1 ADJUST

IB1

D1 D2 D3 D4

1N4934

0.1

μF

Ib2 ADJUST

PULSES

680 pF

IB1 adjusted to

δ = 3%

2N3763

dTb ADJUST

obtain the forced

hFE desired

PW Varied to Attain

680 pF

100

160

MR854

TURN±OFF TIME

IC = 200 mA

Use inductive switching

2N6339

2 W

0.22 μF

driver as the input to

VCC

the resistive test circuit.

CIRCUIT VALUES

Lcoil = 25 mH, VCC = 10 V

Lcoil

= 180 μH

Vclamp = 300 V

VCC = 300 V

Rcoil = 0.05 Ω

RL = 83 Ω

Rcoil = 0.7 Ω

RB ADJUSTED TO ATTAIN DESIRED IB1

VCC = 20 V

Pulse Width = 10 μs

INDUCTIVE TEST CIRCUIT

OUTPUT WAVEFORMS

RESISTIVE TEST CIRCUIT

t1 Adjusted to

CIRCUITS

TUT

Obtain IC

TUT

Rcoil

t Clamped

Lcoil (ICpk)

C(pk)

1N4937

≈

INPUT

Lcoil

VCC

EQUIVALENT

Lcoil

(IC

)

VCC

TEST

SEE ABOVE FOR

≈

DETAILED CONDITIONS

Vclamp

VCC

VCE

VClamp

VCE or

RS =

Test Equipment

Vclamp

0.1

Scope Ð Tektronix

TIME

475 or Equivalent

		IC pk			VCE(pk)
					VCE(pk)		(AMPS)
		90% VCE(pk)	90% IC(pk)				(AMPS)
		90% VCE(pk)	90% IC(pk)
IC	tsv	trv	tfi		tti		CURRENT
I	90% I	tc		I	pk	2% IC	CURRENT
I	90% I	10% VCE(pk)		I	pk	2% IC	BASE,
VCE		10% VCE(pk)		10%
B	B1				C		B2(pk)
							B2(pk)
							I
		TIME

10
10	βf	= 5
	βf	= 5
8	IC	= 10	A
6


4


2


0

	1			2	3	4	5	6
0	1			2	3	4	5	6

VBE(off), BASE±EMITTER VOLTAGE (VOLTS)

Figure 7. Inductive Switching Measurements

Figure 8. Peak±Reverse Current

4	Motorola Bipolar Power Transistor Device Data

BUV48 BUV48A

SWITCHING TIMES NOTE

In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage waveforms since they are in phase. However, for inductive loads which are common to SWITCHMODE power supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements must be made on each waveform to determine the total switching time. For this reason, the following new terms have been defined.

tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp trv = Voltage Rise Time, 10±90% Vclamp

tfi = Current Fall Time, 90±10% IC tti = Current Tail, 10±2% IC

tc = Crossover Time, 10% Vclamp to 10% IC

An enlarged portion of the inductive switching waveforms is

shown in Figure 7 to aid in the visual identity of these terms. For the designer, there is minimal switching loss during storage time and the predominant switching power losses occur during the crossover interval and can be obtained us-

ing the standard equation from AN±222:

PSWT = 1/2 VCCIC(tc) f

In general, trv + tfi ] tc. However, at lower test currents this relationship may not be valid.

As is common with most switching transistors, resistive switching is specified at 25_C and has become a benchmark for designers. However, for designers of high frequency converter circuits, the user oriented specifications which make this a ªSWITCHMODEº transistor are the inductive switching speeds (tc and tsv) which are guaranteed at 100_C.

INDUCTIVE SWITCHING

t, TIME ( μs)

5										1
3										0.5
										0.5						TC = 100°C
2										0.3						TC = 100°C
						TC = 100°C				0.3
						TC = 100°C				0.2						TC = 100°C
						TC = 25°C			μs)	0.2						TC = 100°C
1						TC = 25°C			μs)							TC = 25°C
0.7									(
0.7									t, TIME	0.1
0.5									t, TIME	0.05						TC = 25°C
0.3										0.05
0.3										0.03		tc
0.2										0.03		tc
0.2										0.02		tfi
	βf = 5									0.02		tfi
	βf = 5									β	= 5
										f
0.1	2	3	5	7	10	20	30	50		0.01	2	3	5	7	10	20	30	50
1	2	3	5	7	10	20	30	50		1	2	3	5	7	10	20	30	50
		IC, COLLECTOR CURRENT (AMPS)										IC, COLLECTOR CURRENT (AMPS)
		Figure 9. Storage Time, tsv								Figure 10. Crossover and Fall Times

	3		tsv									3
	2		tsv									2								TC = 25°C
	1											1								IC = 10 A
	1											1								βf = 5 V
																		tsv		βf = 5 V
	0.5											0.5						tsv
	0.5											0.5
μs)	0.3		t								μs)	0.3
(	0.2		c								(	0.2
TIME	0.2										TIME	0.2
TIME	0.1		tfi								TIME	0.1						tc
t,	0.1		tfi								t,	0.1
	0.05											0.05						tfi
	0.03								TC = 25°C			0.03
	0.02								IC = 10 A			0.02
									VBE(off) = 5 V
	0.01	1	2	3	4	5	6	7	8	9	10	0.01	1	2	3	4	5	6	7	8	9	10
	0	1	2	3	4	5	6	7	8	9	10	0	1	2	3	4	5	6	7	8	9	10
					βf, FORCED GAIN												Ib2/Ib1

Figure 11a. Turn±Off Times versus Forced Gain

Figure 11b. Turn±Off Times versus Ib2/Ib1

Motorola Bipolar Power Transistor Device Data

BUV48 BUV48A

The Safe Operating Area figures shown in Figures 12 and 13 are specified for these devices under the test conditions shown.

	30
(AMPS)	10					1 ms
	5					1 ms
	5
					DC
CURRENT	2				DC
	2
	1
	0.5
, COLLECTOR	0.5
	0.2	TC = 25°C
	0.1				LIMIT ONLY
	0.05				LIMIT ONLY
	0.05				FOR TURN ON
C
I						tr ≤ 0.7 μs
	0.02					tr ≤ 0.7 μs
	0.01	2	5	10	20	50	100	200	500	1000
	1	2	5	10	20	50	100	200	500	1000
			VCE, COLLECTOR±EMITTER VOLTAGE (VOLTS)

Figure 12. Forward Bias Safe Operating Area

	50
(AMPS)	40
(AMPS)
CURRENT	30
					BUV48	BUV48A

, COLLECTOR	20
		VBE(off) = 5 V
	10	T	C	= 100°C
C		T		= 100°C
I
		IC/IB ≥ 5
	0	0		200	400	600	800	1000
		0		200	400	600	800	1000
				VCE, COLLECTOR±EMITTER VOLTAGE (VOLTS)

FIgure 13. Reverse Bias Safe Operating Area

SAFE OPERATING AREA INFORMATION

FORWARD BIAS

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC ± VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 12 is based on TC = 25_C; TJ(pk) is variable depending on power level. Second breakdown pulse

limits are valid for duty cycles to 10% but must be derated when TC v 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 12 may be found at any case temperature by using the appropriate curve on Figure 14.

TJ(pk) may be calculated from the data in Figure 11. At high case temperatures, thermal limitations will reduce the power

that can be handled to values less than the limitations imposed by second breakdown.

REVERSE BIAS

For inductive loads, high voltage and high current must be sustained simultaneously during turn±off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage current conditions during reverse biased turn±off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 13 gives RBSOA characteristics.

POWER DERATING FACTOR (%)

	100
	80	SECOND BREAKDOWN
	80	DERATING
		DERATING
	60
		THERMAL DERATING
	40
	20
	0

0	40	80	120	160	200
		TC, CASE TEMPERATURE (°C)

Figure 14. Power Derating

6	Motorola Bipolar Power Transistor Device Data

																BUV48	BUV48A
		1
EFFECTIVE TRANSIENT THERMAL		0.5	D = 0.5
	RESISTANCE (NORMALIZED)	0.5
		0.2		0.2
		0.2
				0.1										P(pk)
		0.1	0.05								RθJC(t) = r(t) RθJC			P(pk)
			0.05								θJC = 1°C/W MAX
			0.02								θJC = 1°C/W MAX
		0.05	0.02								D CURVES APPLY FOR POWER
						0.01					PULSE TRAIN SHOWN				t1
						0.01					READ TIME AT t1				t1	t2
					SINGLE PULSE						READ TIME AT t1					t2
		0.02									TJ(pk) ± TC = P(pk) RθJC(t)				DUTY CYCLE, D = t1/t2
r(t),
r(t),
		0.01
		0.02		0.05	0.1	0.2	0.5	1	2	5	10	20	50	100	200	500	1000	2000

t, TIME (ms)

Figure 15. Thermal Response

OVERLOAD CHARACTERISTICS

	100
(AMPS)		TC = 25°C
	80				BUV48A
					BUV48A

CURRENT	60
CURRENT
, COLLECTOR	40		tp = 10 μs		BUV48
	40
	20
C
I
	0	100	200	300	400	450	500
		VCE, COLLECTOR±EMITTER VOLTAGE (VOLTS)

Figure 16. Rated Overload Safe Operating Area

(OLSOA)

OLSOA

OLSOA applies when maximum collector current is limited and known. A good example is a circuit where an inductor is inserted between the transistor and the bus, which limits the rate of rise of collector current to a known value. If the transistor is then turned off within a specified amount of time, the magnitude of collector current is also known.

Maximum allowable collector±emitter voltage versus collector current is plotted for several pulse widths. (Pulse width is defined as the time lag between the fault condition and the removal of base drive.) Storage time of the transistor has been factored into the curve. Therefore, with bus voltage and maximum collector current known, Figure 16 defines the maximum time which can be allowed for fault detection and shutdown of base drive.

OLSOA is measured in a common±base circuit (Figure 18) which allows precise definition of collector±emitter voltage and collector current. This is the same circuit that is used to measure forward±bias safe operating area.

	5
	4
(AMP)	3
(AMP)
C
I	2
	2
	1

RBE = 100

500 μF

RBE

= 2.2

RBE = 10

500 V

VCC

Notes:

R =

• VCE = VCC + VBE

• Adjust pulsed current source

for desired IC, tp

VEE

dV/dt (KV/μs)

Figure 17. IC = f(dV/dt)

Figure 18. Overload SOA Test Circuit

Motorola Bipolar Power Transistor Device Data

BUV48 BUV48A

PACKAGE DIMENSIONS

		C	NOTES:
B	Q	E	1.	DIMENSIONING AND TOLERANCING PER ANSI
B	Q	E		Y14.5M, 1982.
			2.	CONTROLLING DIMENSION: MILLIMETER.

					MILLIMETERS		INCHES
	U		4	DIM	MIN	MAX	MIN	MAX
			A	A	19.00	19.60	0.749	0.771
	L		A	B	14.00	14.50	0.551	0.570
S	L			C	4.20	4.70	0.165	0.185
S				D	1.00	1.30	0.040	0.051
				D	1.00	1.30	0.040	0.051
	1	2	3	E	1.45	1.65	0.058	0.064
K	1	2	3	G	5.21	5.72	0.206	0.225
K				G	5.21	5.72	0.206	0.225
				H	2.60	3.00	0.103	0.118
				J	0.40	0.60	0.016	0.023
				K	28.50	32.00	1.123	1.259
				L	14.70	15.30	0.579	0.602
				Q	4.00	4.25	0.158	0.167
				S	17.50	18.10	0.689	0.712
				U	3.40	3.80	0.134	0.149
				V	1.50	2.00	0.060	0.078

D J

V	H	STYLE 1:
	G	PIN 1.	BASE
	G	2.	COLLECTOR
		2.	COLLECTOR
		3.	EMITTER
		4.	COLLECTOR

CASE 340D±01

TO±218 TYPE

ISSUE A

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ªTypicalº parameters can and do vary in different applications. All operating parameters, including ªTypicalsº must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

How to reach us:
USA / EUROPE: Motorola Literature Distribution;	JAPAN: Nippon Motorola Ltd.; Tatsumi±SPD±JLDC, Toshikatsu Otsuki,
P.O. Box 20912; Phoenix, Arizona 85036. 1±800±441±2447	6F Seibu±Butsuryu±Center, 3±14±2 Tatsumi Koto±Ku, Tokyo 135, Japan. 03±3521±8315
MFAX: RMFAX0@email.sps.mot.com ± TOUCHTONE (602) 244±6609 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
INTERNET: http://Design±NET.com	51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852±26629298

◊ BUV48/D

*BUV48/D*

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