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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order this document by MJ13333/D

MJ13333

Designer's Data Sheet

SWITCHMODE Series

NPN Silicon Power Transistor

The MJ13333 transistor is designed for high voltage, high±speed, power switching in inductive circuits where fall time is critical. It is particularly suited for line operated switchmode applications such as:

Switching Regulators

Inverters

Solenoid and Relay Drivers

Motor Controls

Deflection Circuits

Fast Turn Off Times

200 ns Inductive Fall Time Ð 25 _C (Typ) 1.8 μs Inductive Storage Time Ð 25 _C (Typ)

Operating Temperature Range ±65 to +200_C

100_C Performance Specified for:

Reversed Biased SOA with Inductive Loads

Switching Times with Inductive Loads

Saturation Voltages

Leakage Currents

MAXIMUM RATINGS

20 AMPERE

NPN SILICON

POWER TRANSISTORS

400±500 VOLTS

175 WATTS

CASE 1±07 TO±204AA (TO±3)

Rating

Symbol

Value

Unit

 

 

 

 

Collector±Emitter Voltage

VCEO

400

Vdc

Collector±Emitter voltage

VCEV

700

Vdc

Emitter Base Voltage

VEB

6.0

Vdc

Collector Current Ð Continuous

IC

20

Adc

Peak (1)

ICM

30

 

Base Current Ð Continuous

IB

10

Adc

Peak (1)

IBM

15

 

Total Power Dissipation @ TC = 25_C

PD

175

Watts

@ TC = 100_C

 

100

 

Derate above 25_C

 

1.0

W/_C

 

 

 

 

Operating and Storage Junction Temperature Range

TJ, Tstg

± 65 to +200

_C

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

Unit

 

 

 

 

Thermal Resistance, Junction to Case

RqJC

1.0

_C/W

Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 5 Seconds

TL

275

_C

(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle v10%.

(1) Similar device types available with lower VCEO ratings, see the MJ13330 (200 V) and MJ13331 (250 V).

Designer's and SWITCHMODE are trademarks of Motorola, Inc.

Designer's Data for ªWorst Caseº Conditions Ð The Designer 's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves Ð representing boundaries on device characteristics Ð are given to facilitate ªworst caseº design.

REV 1

Motorola, Inc. 1995

MJ13333

ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)

 

 

Characteristic

Symbol

Min

Typ

Max

Unit

 

 

 

 

 

 

 

 

OFF CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

 

Collector±Emitter Sustaining Voltage (Table 1)

VCEO(sus)

400

Ð

Ð

Vdc

(IC = 100 mA, IB = 0)

 

 

 

 

 

 

Collector Cutoff Current

 

ICEV

 

 

 

mAdc

(VCEV = Rated Value, VBE(off) = 1.5 Vdc)

 

Ð

Ð

0.25

 

(VCEV = Rated Value, VBE(off) = 1.5 Vdc, TC = 150_C)

 

Ð

Ð

5.0

 

Collector Cutoff Current

 

ICER

Ð

Ð

5.0

mAdc

(VCE = Rated VCEV, RBE = 50 Ω, TC = 100_C)

 

 

 

 

 

Emitter Cutoff Current

 

IEBO

Ð

Ð

1.0

mAdc

(VEB = 6.0 Vdc, IC = 0)

 

 

 

 

 

 

SECOND BREAKDOWN

 

 

 

 

 

 

 

 

 

 

 

 

Second Breakdown Collector Current with base forward biased

IS/b

 

See Figure 12

 

Clamped Inductive SOA with Base Reverse Biased

RBSOA

 

See Figure 13

 

 

 

 

 

 

 

 

ON CHARACTERISTICS (1)

 

 

 

 

 

 

 

 

 

 

 

 

 

DC Current Gain

 

hFE

10

Ð

60

Ð

(IC = 5.0 Adc, VCE = 5.0 Vdc)

 

 

 

 

 

Collector±Emitter Saturation Voltage

VCE(sat)

 

 

 

Vdc

(IC = 10 Adc, IB = 2.0 Adc)

 

Ð

Ð

1.8

 

(IC = 20 Adc, IB = 6.7 Adc)

 

Ð

Ð

5.0

 

(IC = 10 Adc, IB = 2.0 Adc, TC = 100_C)

 

Ð

Ð

2.4

 

Base Emitter Saturation Voltage

VBE(sat)

 

 

 

Vdc

(IC = 10 Adc, IB = 2.0 Adc)

 

Ð

Ð

1.8

 

(IC = 10 Adc, IB = 2.0 Adc, TC = 100_C)

 

Ð

Ð

1.8

 

DYNAMIC CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Capacitance

 

Cob

125

Ð

500

pF

(VCB = 10 Vdc, IE = 0, ftest = 1.0 kHz)

 

 

 

 

 

SWITCHING CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

 

Resistive Load (Table 1)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Delay Time

 

 

td

Ð

0.02

0.1

μs

Rise Time

 

(VCC = 250 Vdc, IC = 10 A,

t

Ð

0.3

0.7

μs

 

 

IB1 = 2.0 A, VBE(off) = 5.0 Vdc, tp = 10 μs,

r

 

 

 

 

Storage Time

 

ts

Ð

1.6

4.0

μs

 

Duty Cycle v 2.0%)

Fall Time

 

 

tf

Ð

0.3

0.7

μs

Inductive Load, Clamped (Table 1)

 

 

 

 

 

 

 

 

 

 

 

 

Storage Time

 

(IC = 10 A(pk), Vclamp = 250 Vdc, IB1 = 2.0 A,

tsv

Ð

2.5

5.0

μs

Crossover Time

 

VBE(off) = 5 Vdc, TC = 100°C)

tc

Ð

0.8

2.0

μs

Storage Time

 

(IC = 10 A(pk), Vclamp = 250 Vdc, IB1 = 2.0 A,

tsv

Ð

1.8

Ð

μs

Crossover Time

 

tc

Ð

0.4

Ð

μs

 

VBE(off) = 5 Vdc, TC = 25_C)

Fall Time

 

 

tfi

Ð

0.2

Ð

μs

(1) Pulse Test: PW = 300 μs, Duty Cycle v 2%.

2

Motorola Bipolar Power Transistor Device Data

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MJ13333

 

100

 

 

 

 

 

(VOLTS)

2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

150°C

 

 

 

 

 

 

 

 

 

 

 

 

 

50

 

 

 

 

VOLTAGE

1.6

 

 

 

 

 

 

 

 

 

CURRENT GAIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.2

 

1 A

 

 

5 A

 

10 A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20

 

 

25°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.8

 

 

 

 

 

 

 

 

 

, DC

 

 

 

 

 

 

COLLECTOR±EMITTER

 

 

 

 

 

 

 

 

 

 

 

 

VCE = 5 V

 

 

 

 

 

 

 

 

 

 

 

 

FE

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

h

 

 

 

 

 

0.4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

,

 

 

 

 

 

 

 

 

 

 

 

5.0

 

 

 

 

 

CE

0

 

 

 

 

 

 

 

 

 

 

0.5

1.0

2.0

5.0

10

V

0.02

0.05

0.1

0.2

0.5

1.0

2.0

5.0

10

 

0.2

20

0.01

 

 

 

IC, COLLECTOR CURRENT (AMPS)

 

 

 

 

 

IB, BASE CURRENT (AMP)

 

 

 

Figure 1. DC Current Gain

Figure 2. Collector Saturation Region

(VOLTS)

2.0

 

 

 

 

 

 

 

 

 

IC/IB = 5

 

 

 

VOLTAGE

1.6

 

 

 

 

 

 

1.2

 

 

 

 

 

 

COLLECTOR±EMITTER

 

 

 

 

 

 

0.8

 

 

 

 

 

 

0.4

 

 

25°C

 

 

 

 

 

 

 

 

 

,

 

 

 

 

 

 

 

CE

0

 

 

150°C

 

 

 

V

 

 

 

 

 

20

 

0.2

0.5

1.0

2.0

5.0

10

IC, COLLECTOR CURRENT (AMP)

Figure 3. Collector±Emitter Saturation Region

 

104

 

 

 

 

 

μA)

103

 

 

 

 

 

(

 

 

 

 

 

 

CURRENT

 

TJ = 150°C

 

 

 

 

102

125°C

 

 

 

 

,COLLECTOR

101

100°C

 

 

 

 

75°C

 

 

 

 

 

 

 

 

 

0

REVERSE

 

FORWARD

 

 

C

 

 

 

 

 

I

10

25°C

 

 

VCE = 250 V

 

 

 

 

 

10±1

± 0.2

0

+ 0.2

+ 0.4

+ 0.6

 

± 0.4

 

 

VBE, BASE±EMITTER VOLTAGE (VOLTS)

 

Figure 5. Collector Cutoff Region

(VOLTS)

2.0

 

 

 

 

 

 

VOLTAGE

 

 

 

 

 

 

 

 

 

IC/IB = 5

 

 

 

1.6

 

 

 

 

 

 

 

 

 

 

 

 

 

SATURATION

1.2

 

 

 

 

 

 

 

 

 

25°C

 

 

 

 

 

 

 

 

 

 

, BASE±EMITTER

0.8

 

 

 

 

 

 

0.4

 

 

150°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BE(sat)

0

0.5

1.0

2.0

5.0

10

20

0.2

V

 

 

IC, COLLECTOR CURRENT (AMP)

 

 

 

 

 

 

 

Figure 4. Base±Emitter Voltage

 

3000

 

 

 

 

 

 

 

 

 

2000

 

 

 

 

 

 

 

 

 

 

 

 

Cib

 

 

 

 

 

(pF)

1000

 

 

 

 

 

 

 

 

700

 

 

 

 

 

 

 

 

C, CAPACITANCE

 

 

 

 

 

 

 

 

500

 

 

 

 

 

 

 

 

200

 

 

 

 

 

 

 

 

 

 

 

 

 

Cob

 

 

 

 

100

 

 

 

 

 

 

 

 

 

50

 

 

 

 

 

 

 

 

 

30

0.5

1.0

5.0

10

50

100

500

1000

 

0.1

VR, REVERSE VOLTAGE (VOLTS)

Figure 6. Capacitance

Motorola Bipolar Power Transistor Device Data

3

MJ13333

 

 

 

 

 

 

 

IC pk

 

Vclamp

 

 

 

 

 

 

90% Vclamp

90% IC

 

IC

tsv

trv

tfi

 

tti

 

 

 

tc

 

 

VCE

 

10% Vclamp

10%

2% IC

I

90% I

 

 

I pk

B

B1

 

 

C

 

 

 

TIME

 

 

 

Figure 7. Inductive Switching Measurements

 

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I

C = 10

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(AMP)

 

 

I

B1 = 2

A

 

 

 

 

 

 

 

 

 

 

Vclamp

= 250

V

 

 

 

 

 

 

 

CURRENTBASE,

7.0

 

TJ = 25

°C

 

 

 

 

 

 

 

 

5.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B2(pk)

 

 

 

 

 

 

 

 

 

 

 

 

2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

2.0

 

5.0

 

 

 

10

 

 

 

 

VBE(off), REVERSE BASE VOLTAGE (VOLTS)

 

 

Figure 8. Reverse Base Current versus VBE(off) With No External Base Resistance

SWITCHING TIMES NOTE

In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage waveforms since they are in phase. However, for inductive loads which are common to SWITCHMODE power supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements must be made on each waveform to determine the total switching time. For this reason, the following new terms have been defined.

tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp trv = Voltage Rise Time, 10 ± 90% Vclamp

tfi = Current Fall Time, 90 ± 10% IC tti = Current Tail, 10 ± 2% IC

tc = Crossover Time, 10% Vclamp to 10% IC

An enlarged portion of the inductive switching waveforms is shown in Figure 7 to aid in the visual identity of these terms.

For the designer, there is minimal switching loss during storage time and the predominant switching power losses occur during the crossover interval and can be obtained using the standard equation from AN±222:

PSWT = 1/2 VCCIC(tc)f

In general, trv + tfi ] tc. However, at lower test currents this relationship may not be valid.

As is common with most switching transistors, resistive switching is specified at 25°C and has become a benchmark for designers, However, for designers of high frequency converter circuits, the user oriented specifications which make this a ªSWITCHMODEº transistor are the inductive switching speeds (tc and tsv) which are guaranteed at 100°C.

RESISTIVE SWITCHING PERFORMANCE

 

2.0

 

 

 

 

 

 

 

1.0

 

 

VCC = 250 V

 

 

 

 

 

 

 

 

 

 

 

0.5

 

 

IC/IB = 5

 

 

tr

 

 

 

 

 

 

 

μs)

 

 

 

 

 

 

 

(

 

 

 

 

 

 

 

t, TIME

0.2

 

 

 

 

 

 

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.05

 

 

 

 

 

 

 

 

 

 

td

 

 

 

 

0.02

0.5

1.0

2.0

5.0

10

20

 

0.2

IC, COLLECTOR CURRENT (AMP)

Figure 9. Turn±On Switching Times

 

5.0

 

 

 

 

 

 

 

 

2.0

 

 

 

ts

 

 

 

 

 

 

 

 

 

 

 

μs)

1.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(

 

 

 

 

 

 

 

 

TIME

0.5

 

 

 

 

 

 

tf

 

 

 

 

 

 

 

t,

 

VCE = 250 V

 

 

 

 

 

 

0.2

 

 

 

 

 

 

IC/IB = 5

 

 

 

 

 

 

 

0.1

VBE(off) = 5 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.05

0.2

0.5

1.0

2.0

5.0

10

20

 

 

IC, COLLECTOR CURRENT (AMP)

Figure 10. Turn±Off Switching Times

4

Motorola Bipolar Power Transistor Device Data

MJ13333

Table 1. Test Conditions for Dynamic Performance

 

VCEO(sus)

 

 

RBSOA AND INDUCTIVE SWITCHING

 

 

 

 

 

 

RESISTIVE SWITCHING

 

 

 

 

 

 

 

 

 

 

 

+15 V

 

 

 

 

 

 

250 μF

 

470 Ω

47 Ω

R1

 

 

 

 

 

 

 

 

 

 

 

 

 

2 W

 

 

 

 

 

 

 

 

 

 

 

 

15 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TURN±ON TIME

 

+10 V

0

 

 

330 Ω

 

 

 

 

 

 

 

 

 

1

 

1

 

 

 

 

 

 

 

 

 

 

 

 

INPUT CONDITIONS

20

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

1

 

 

 

IB1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5.1 Ω

R2

 

 

2

 

 

 

 

 

2

 

 

 

 

5 W

 

 

 

 

 

IB1 adjusted to

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

obtain the forced

 

 

50 Ω

100 Ω

 

 

 

 

 

 

 

 

 

hFE desired

 

 

 

 

 

 

 

 

 

 

 

 

 

PW Varied to Attain

 

 

 

 

 

 

 

 

 

 

TURN±OFF TIME

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IC = 100 mA

 

 

 

 

 

39 Ω

 

 

 

 

 

 

 

Use inductive switching

 

 

 

 

 

 

430 Ω

 

 

 

 

 

 

 

driver as the input to

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

All Diodes Ð 1N4934

 

 

 

 

 

± 5.2

 

 

the resistive test circuit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

All NPN Ð MJE200

 

 

250 μF

 

 

 

 

 

 

 

 

 

 

 

All PNP Ð MJE210

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Adjust R1 to obtain IB1

 

 

 

 

 

 

 

 

 

 

 

 

 

For switching and RBSOA, R2 = 0

 

 

 

 

 

 

 

 

 

 

 

 

For VCEO(sus), R2 =

 

 

 

 

 

 

 

 

 

 

CIRCUIT VALUES

Lcoil = 80 mH, VCC = 10 V

Lcoil

= 180 μH

Vclamp

= 250 V

 

 

 

 

 

 

 

VCC = 250 V

Rcoil

= 0.05 Ω

 

 

 

 

 

 

 

RL = 50 Ω

Rcoil = 0.7 Ω

 

RB adjusted to attain desired IB1

 

 

 

 

 

 

 

VCC

= 20 V

 

 

 

 

 

 

Pulse Width = 10 μs

 

 

 

 

 

 

 

 

 

 

 

 

 

INDUCTIVE TEST CIRCUIT

 

 

OUTPUT WAVEFORMS

t1 Adjusted to

RESISTIVE TEST CIRCUIT

 

 

 

 

 

 

 

 

 

 

CIRCUITS

 

 

 

IC

 

 

 

Obtain IC

 

 

 

 

1 TUT

 

Rcoil

 

IC(pk)

 

t Clamped

t

Lcoil (ICpk)

 

TUT

 

1N4937

 

 

 

 

f

1

 

 

VCC

1

RL

 

 

 

 

 

t

 

 

 

INPUT

OR

Lcoil

 

t1

tf

 

 

L

coil

(I

)

2

VCC

TEST

SEE ABOVE FOR

EQUIVALENT

 

 

 

t2

 

 

Cpk

 

Vclamp

 

VCE

 

 

 

 

VClamp

 

 

DETAILED CONDITIONS

VCC

VCE or

 

 

 

 

 

 

 

 

2

RS =

 

 

 

 

Test Equipment

 

 

 

 

 

Vclamp

 

Scope Ð Tektronix

 

 

 

 

0.1 Ω

 

 

t

 

 

 

 

 

 

 

TIME

 

475 or Equivalent

 

 

 

 

 

 

 

 

t2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EFFECTIVE TRANSIENT THERMAL

 

0.7

D = 0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESISTANCE (NORMALIZED)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.3

0.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.2

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P(pk)

 

 

 

 

0.1

0.05

 

 

 

 

 

 

 

RθJC(t) = r(t) RθJC

 

 

 

 

 

 

0.07

 

 

 

 

 

 

 

RθJC = 1.0°C/W MAX

 

 

 

 

 

 

 

 

0.02

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.05

 

 

 

 

 

 

 

D CURVES APPLY FOR POWER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PULSE TRAIN SHOWN

 

 

 

t1

 

 

 

 

 

 

 

0.01

 

 

 

 

 

 

 

 

 

 

 

 

0.03

 

 

 

 

 

 

 

READ TIME AT t1

 

 

 

 

t2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.02

SINGLE PULSE

 

 

 

 

 

 

TJ(pk) ± TC = P(pk) RθJC(t)

 

 

 

 

 

 

 

r(t),

 

 

 

 

 

 

 

 

 

DUTY CYCLE, D = t1/t2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.01

0.02 0.03

0.05

0.1

0.2

0.3

0.5

1

2

3

5

10

20

30

50

100

200

300

500

1000

 

 

0.01

t, TIME (ms)

Figure 11. Thermal Response

Motorola Bipolar Power Transistor Device Data

5

MJ13333

 

50

 

10 μs

 

20

 

 

100

μs

(AMP)

5

CURRENT

10

 

 

2

dc

1 ms

 

 

 

COLLECTOR,

1

 

 

0.2

BONDING WIRE LIMIT

 

 

 

 

0.1

 

 

THERMAL LIMIT @ TC = 25°C

 

 

0.05

 

 

(SINGLE PULSE)

 

C

0.02

SECOND BREAKDOWN LIMIT

 

I

MJ13333

 

0.01

 

 

 

 

0.005

 

 

 

6

10

 

 

20

 

50

100

200

350 450 600

 

 

 

 

V , COLLECTOR±EMITTER VOLTAGE (VOLTS) 400 500

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 12. Forward Bias Safe Operating Area

(AMPS)

20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CURRENT

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

COLLECTOR

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PEAK,

 

 

 

IC/IB

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4.0

 

 

 

VBE(off) = 5 V

 

 

 

 

 

 

 

 

 

 

C(pk)

 

 

 

 

TJ = 100°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100

 

200

300

400

500

600

 

 

 

 

 

 

 

 

VCE, COLLECTOR±EMITTER VOLTAGE (VOLTS)

Figure 13. RBSOA, Reverse Bias Switching

Safe Operating Area

SAFE OPERATING AREA INFORMATION

FORWARD BIAS

There are two limitations on the power handling ability of a transistor average junction temperature and second breakdown. Safe operating area curves indicate IC ± VCE limits of the transistor that must be observed for reliable operation, i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 12 is based on TC = 25_C. TJ(pk) is variable depending on power level. Second breakdown pulse

limits are valid for duty cycles to 10% but must be derated when TC 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 12 may be found at any case temperature by using the appropriate curve on Figure 14.

TJ(pk) may be calculated from the data in Figure 11. At high case temperatures, thermal limitations will reduce the power

that can be handled to values less than the limitations imposed by second breakdown.

REVERSE BIAS

For inductive loads, high voltage and high current must be sustained simultaneously during turn±off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage±current condition allowable during reverse biased turn±off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 13 gives the complete RBSOA characteristics.

 

100

 

 

 

 

 

(%)

 

 

 

FORWARD BIAS

 

80

 

 

SECOND BREAKDOWN

 

FACTOR

 

 

DERATING

 

 

 

 

 

 

 

60

 

 

 

 

 

DERATING

 

 

 

 

 

 

 

THERMAL

 

 

 

40

 

DERATING

 

 

 

 

 

 

 

 

 

POWER

20

 

 

 

 

 

 

0

40

80

120

160

200

 

0

 

 

 

TC, CASE TEMPERATURE (°C)

 

 

Figure 14. Power Derating

6

Motorola Bipolar Power Transistor Device Data

MJ13333

PACKAGE DIMENSIONS

 

A

 

 

 

 

 

 

 

 

 

 

 

 

N

 

 

 

 

 

 

NOTES:

 

 

 

 

 

C

 

 

 

 

 

 

1. DIMENSIONING AND TOLERANCING PER ANSI

 

 

 

 

 

 

 

Y14.5M, 1982.

 

 

 

 

 

±T±

SEATING

 

 

2. CONTROLLING DIMENSION: INCH.

 

 

E

 

 

PLANE

 

 

3. ALL RULES AND NOTES ASSOCIATED WITH

 

 

 

 

 

 

 

REFERENCED TO±204AA OUTLINE SHALL APPLY.

 

D 2 PL

K

 

 

 

 

 

 

 

 

 

 

 

 

INCHES

MILLIMETERS

 

 

 

 

 

 

 

 

 

0.13 (0.005) M

T

Q

M

Y

M

 

 

DIM

MIN

MAX

MIN

MAX

 

U

 

 

 

 

 

 

A

1.550 REF

39.37 REF

 

±Y±

 

 

 

 

B

±±±

1.050

±±±

26.67

V

L

 

 

 

 

 

 

 

 

 

 

C

0.250

0.335

6.35

8.51

 

2

 

 

 

 

 

 

D

0.038

0.043

0.97

1.09

 

 

B

 

 

 

 

E

0.055

0.070

1.40

1.77

H

G

 

 

 

 

 

G

0.430 BSC

10.92 BSC

1

 

 

 

 

 

 

H

0.215 BSC

5.46 BSC

 

 

 

 

 

 

 

K

0.440

0.480

11.18

12.19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

0.665 BSC

16.89 BSC

 

±Q±

 

 

 

 

 

 

N

±±±

0.830

±±±

21.08

 

0.13 (0.005) M

T

Y

M

 

 

 

Q

0.151

0.165

3.84

4.19

 

 

 

 

U

1.187 BSC

30.15 BSC

 

 

 

 

 

 

 

 

V

0.131

0.188

3.33

4.77

 

 

 

 

 

 

 

 

STYLE 1:

 

 

 

 

 

 

 

 

 

 

 

PIN 1. BASE

 

 

 

 

 

 

 

 

 

 

 

2. EMITTER

 

 

 

 

 

 

 

 

 

 

CASE: COLLECTOR

 

 

CASE 1±07

TO±204AA (TO±3)

ISSUE Z

Motorola Bipolar Power Transistor Device Data

7

MJ13333

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ªTypicalº parameters can and do vary in different applications. All operating parameters, including ªTypicalsº must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

How to reach us:

 

USA / EUROPE: Motorola Literature Distribution;

JAPAN: Nippon Motorola Ltd.; Tatsumi±SPD±JLDC, Toshikatsu Otsuki,

P.O. Box 20912; Phoenix, Arizona 85036. 1±800±441±2447

6F Seibu±Butsuryu±Center, 3±14±2 Tatsumi Koto±Ku, Tokyo 135, Japan. 03±3521±8315

MFAX: RMFAX0@email.sps.mot.com ± TOUCHTONE (602) 244±6609 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,

INTERNET: http://Design±NET.com

51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852±26629298

MJ13333/D

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