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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order this document by MMDF1N05E/D

Medium Power Surface Mount Products

MMDF1N05E

TMOS Dual N-Channel

 

Field Effect Transistors

 

 

MiniMOS devices are an advanced series of power MOSFETs which utilize Motorola's TMOS process. These miniature surface

mount MOSFETs feature ultra low RDS(on) and true logic level performance. They are capable of withstanding high energy in the

avalanche and commutation modes and the drain±to±source diode has a low reverse recovery time. MiniMOS devices are designed for use in low voltage, high speed switching applications where power efficiency is important. Typical applications are dc±dc converters, and power management in portable and battery powered products such as computers, printers, cellular and cordless phones. They can also be used for low voltage motor controls in mass storage products such as disk drives and tape

drives. The avalanche energy is specified to eliminate the G guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients.

Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life

Logic Level Gate Drive Ð Can Be Driven by Logic ICs

Miniature SO±8 Surface Mount Package Ð Saves Board Space

Diode Is Characterized for Use In Bridge Circuits

Diode Exhibits High Speed

Avalanche Energy Specified

Mounting Information for SO±8 Package Provided

IDSS Specified at Elevated Temperature

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)

DUAL TMOS MOSFET

50 VOLTS

1.5 AMPERE

RDS(on) = 0.30 OHM

D

CASE 751±05, Style 11

SO±8

S

Source±1

 

 

1

8

 

 

Drain±1

 

 

 

 

 

 

 

2

7

 

 

 

Gate±1

 

 

 

 

Drain±1

Source±2

 

 

3

6

 

 

Drain±2

 

 

 

 

Gate±2

 

 

 

4

5

 

 

Drain±2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Top View

Rating

Symbol

Value

Unit

 

 

 

 

Drain±to±Source Voltage

VDS

50

Volts

Gate±to±Source Voltage Ð Continuous

VGS

± 20

Volts

Drain Current Ð Continuous

ID

2.0

Amps

Drain Current Ð Pulsed

IDM

10

 

Single Pulse Drain±to±Source Avalanche Energy Ð Starting T J = 25°C

EAS

300

mJ

(VDD = 25 V, VGS = 10 V, IL = 2 Apk)

 

 

 

Operating and Storage Temperature Range

TJ, Tstg

± 55 to 150

°C

Total Power Dissipation @ TA = 25°C

PD

2.0

Watts

Thermal Resistance ± Junction to Ambient (1)

RqJA

62.5

°C/W

Maximum Temperature for Soldering,

TL

260

°C

Time in Solder Bath

 

10

Sec

 

 

 

 

DEVICE MARKING

F1N05

(1) Mounted on 2º square FR4 board (1º sq. 2 oz. Cu 0.06º thick single sided) with one die operating, 10 sec. max.

ORDERING INFORMATION

Device

Reel Size

Tape Width

Quantity

 

 

 

 

MMDF1N05ER2

13″

12 mm embossed tape

2500

 

 

 

 

MiniMOS is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.

Thermal Clad is a trademark of the Bergquist Company

REV 5

Motorola, Inc. 1996

MMDF1N05E

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristic

 

Symbol

Min

Typ

Max

Unit

 

 

 

 

 

 

 

 

 

OFF CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Drain±to±Source Breakdown Voltage

 

 

V(BR)DSS

50

Ð

Ð

Vdc

(VGS = 0, ID = 250 μA)

 

 

 

 

 

 

 

Zero Gate Voltage Drain Current

 

 

IDSS

Ð

Ð

250

μAdc

(VDS = 50 V, VGS = 0)

 

 

 

 

 

 

 

Gate±Body Leakage Current

 

 

IGSS

Ð

Ð

100

nAdc

(VGS = 20 Vdc, VDS = 0)

 

 

 

 

 

 

 

ON CHARACTERISTICS(1)

 

 

 

 

 

 

 

Gate Threshold Voltage

 

 

VGS(th)

1.0

Ð

3.0

Vdc

(VDS = VGS, ID = 250 μAdc)

 

 

 

 

 

 

 

Drain±to±Source On±Resistance

 

 

 

 

 

 

Ohms

(VGS = 10 Vdc, ID = 1.5 Adc)

 

 

RDS(on)

Ð

Ð

0.30

 

(VGS = 4.5 Vdc, ID = 0.6 Adc)

 

 

RDS(on)

Ð

Ð

0.50

 

Forward Transconductance (VDS = 15 V, ID = 1.5 A)

gFS

Ð

1.5

Ð

mhos

DYNAMIC CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input Capacitance

 

(VDS = 25 V, VGS = 0,

Ciss

Ð

330

Ð

pF

Output Capacitance

 

Coss

Ð

160

Ð

 

 

 

f = 1.0 MHz)

 

Reverse Transfer Capacitance

 

 

 

Crss

Ð

50

Ð

 

SWITCHING CHARACTERISTICS(2)

 

 

 

 

 

 

 

Turn±On Delay Time

 

 

 

td(on)

Ð

Ð

20

ns

Rise Time

 

(VDD = 10 V, ID = 1.5 A, RL = 10 Ω,

tr

Ð

Ð

30

 

Turn±Off Delay Time

 

VG = 10 V, RG = 50 Ω)

td(off)

Ð

Ð

40

 

Fall Time

 

 

 

tf

Ð

Ð

25

 

Total Gate Charge

 

(VDS = 10 V, ID = 1.5 A,

Qg

Ð

12.5

Ð

nC

Gate±Source Charge

 

Qgs

Ð

1.9

Ð

 

 

 

VGS = 10 V)

 

Gate±Drain Charge

 

 

 

Qgd

Ð

3.0

Ð

 

SOURCE±DRAIN DIODE CHARACTERISTICS (TC = 25°C)

 

 

 

 

 

Forward Voltage(1)

 

(I

= 1.5 A, V = 0 V)

VSD

Ð

Ð

1.6

V

 

 

S

GS

 

 

 

 

 

Reverse Recovery Time

 

(dIS/dt = 100 A/μs)

trr

Ð

45

Ð

ns

(1)Pulse Test: Pulse Width 300 μs, Duty Cycle 2.0%.

(2)Switching characteristics are independent of operating junction temperature.

2

Motorola TMOS Power MOSFET Transistor Device Data

MMDF1N05E

TYPICAL ELECTRICAL CHARACTERISTICS

 

10

6 V

 

TJ = 25°C

 

 

 

 

10 V

 

 

5 V

 

 

8 V

 

 

 

(AMPS)

8

 

 

 

 

 

 

 

 

 

 

 

4.5 V

CURRENT

6

 

 

 

 

 

 

 

 

 

 

 

4 V

 

 

 

 

 

 

 

, DRAIN

4

 

 

 

 

 

 

 

 

 

 

V

 

= 3.5 V

D

 

 

 

 

 

I

2

 

 

 

GS

 

 

 

 

 

 

 

 

 

0

2

4

6

8

 

10

 

0

 

 

 

VDS, DRAIN±TO±SOURCE VOLTAGE (VOLTS)

 

Figure 1. On±Region Characteristics

(OHMS)

0.5

 

 

 

 

 

 

 

 

 

 

 

 

ON±RESISTANCE

 

 

 

 

 

 

 

 

 

 

 

 

VGS = 10 V

 

 

 

 

 

 

 

 

0.4

 

 

 

 

 

 

 

 

 

 

 

 

 

DRAIN±TO±SOURCE,

0.3

 

 

 

 

 

 

 

 

 

 

 

 

0.2

 

 

 

 

 

± 55°C

 

 

 

 

 

 

100°C

 

 

 

 

 

 

 

25°C

DS(on)

0.1

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

0

2

4

6

8

R

 

 

 

 

 

 

 

ID, DRAIN CURRENT (AMPS)

Figure 3. On±Resistance versus Drain Current

(OHMS)

0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESISTANCE

0.4

 

 

 

 

 

ID = 1.5 A

 

 

 

 

 

 

 

 

VGS = 0

 

 

0.3

 

 

 

 

 

 

 

 

, DRAIN±TO±SOURCE

 

 

 

 

 

 

 

 

0.2

 

 

 

 

 

 

 

 

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DS(on)

0

 

4

5

6

7

8

9

10

R

2

3

 

 

 

 

 

TJ, JUNCTION TEMPERATURE

 

 

Figure 5. On Resistance versus

Gate±To±Source Voltage

 

10

 

 

 

 

± 55°C

 

 

 

 

 

 

 

VDS

10 V

 

 

25°C

 

 

(AMPS)

 

 

 

 

 

 

 

8

 

 

 

 

 

100°C

 

 

CURRENT

 

 

 

 

 

 

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DRAIN,

4

 

 

 

25°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D

2

 

 

 

 

 

 

 

 

 

I

 

 

 

 

 

 

 

 

 

 

 

 

100°C

± 55°C

 

 

 

 

 

0

 

 

 

 

 

 

 

 

0

1

2

3

4

5

6

7

8

VGS, GATE±TO±SOURCE VOLTAGE (VOLTS)

Figure 2. Transfer Characteristics

ON±RESISTANCE

 

1.8

 

 

 

 

 

 

 

 

 

1.6

VGS = 10 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.4

ID = 1.5 A

 

 

 

 

 

 

(NORMALIZED)

1.2

 

 

 

 

 

 

 

 

DRAIN±TO±SOURCE

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

0.8

 

 

 

 

 

 

 

 

0.6

 

 

 

 

 

 

 

 

0.4

 

 

 

 

 

 

 

 

,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DS(on)

 

0.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

 

0

± 25

0

25

50

75

100

125

150

 

 

 

 

± 50

 

 

 

 

TJ, JUNCTION TEMPERATURE (°C)

 

 

Figure 4. On±Resistance Variation with Temperature

(NORMALIZED)

1.1

 

 

 

 

 

 

 

 

VDS = VGS

 

 

 

 

 

 

1.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOLTAGE

 

 

 

 

 

 

 

 

 

ID = 1 mA

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

THRESHOLD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GATE,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GS(th)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

± 25

0

25

50

75

100

125 150

V

± 50

TJ, JUNCTION TEMPERATURE (°C)

Figure 6. Gate Threshold Voltage Variation

with Temperature

Motorola TMOS Power MOSFET Transistor Device Data

3

MMDF1N05E

 

 

 

 

 

 

 

 

1200

 

VGS

 

0

 

VDS

 

 

 

 

 

Ciss

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1000

 

Crss

 

 

 

 

 

TJ = 25°C

 

(pF)

800

 

 

 

 

 

 

 

 

 

CAPACITANCE

600

 

VDS = 0

 

 

 

VGS = 0

 

 

 

 

 

 

 

 

 

 

 

 

400

 

 

 

 

 

 

Ciss

 

 

C,

 

 

 

 

 

 

 

Coss

 

 

 

200

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Crss

 

 

 

 

 

 

 

 

 

 

 

 

 

0

15

10

5

0

5

10

15

20

25

 

20

 

GATE±TO±SOURCE OR DRAIN±TO±SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation

SAFE OPERATING AREA INFORMATION

Forward Biased Safe Operating Area

The FBSOA curves define the maximum drain±to±source voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. Because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. The curves are based on a case temperature of 25°C and a maximum junction temperature of 150°C. Limitations for repetitive pulses at various case temperatures can be determined by using the thermal response curves. Motorola Application Note, AN569, ªTransient Thermal Resistance Ð G eneral Data and Its Useº provides detailed instructions.

(VOLTS)

12

 

 

 

 

 

 

 

 

 

10

 

 

VDS = 25 V

 

 

 

 

 

 

VOLTAGE

 

 

 

ID = 1.2 A

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GATE±TO±SOURCE

6

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

,

 

 

 

 

 

 

 

 

 

 

GS

 

 

 

 

 

 

 

 

 

 

V

0

0

2

4

6

8

10

12

14

16

 

Qg, TOTAL GATE CHARGE (nC)

Figure 8. Gate Charge versus

Gate±To±Source Voltage

 

100

VGS = 20 V

 

Mounted on 2º sq. FR4 board (1º sq. 2 oz. Cu 0.06º

 

 

 

 

 

 

 

 

thick single sided) with one die operating, 10s max.

 

 

 

SINGLE PULSE

 

(AMPS)

 

 

10 μs

 

10

TC = 25°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CURRENT

 

 

 

dc

100 μs

 

 

 

 

10 ms

 

 

 

 

 

 

 

 

1

 

 

 

 

 

, DRAIN

0.1

 

 

 

 

 

D

 

RDS(on) LIMIT

 

 

I

 

 

 

 

 

 

 

THERMAL LIMIT

 

 

 

0.01

 

PACKAGE LIMIT

 

 

 

 

 

 

 

 

 

0.1

 

 

1

10

100

VDS, DRAIN±TO±SOURCE VOLTAGE (VOLTS)

Figure 9. Maximum Rated Forward Biased

Safe Operating Area

 

 

10

 

 

 

 

 

 

 

 

 

 

Rthja(t), EFFECTIVE TRANSIENT

THERMAL RESISTANCE

1

D = 0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.2

 

 

 

 

 

 

 

 

 

0.1

0.1

 

 

 

 

Normalized to θja at 10s.

 

0.05

 

 

 

 

 

 

 

 

 

 

 

 

0.02

 

 

Chip

0.0175 Ω

0.0710 Ω

0.2706 Ω

0.5776 Ω

0.7086 Ω

 

 

0.01

 

 

 

 

 

 

 

 

 

 

 

 

 

0.01

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SINGLE PULSE

 

 

 

0.0154 F

0.0854 F

0.3074 F

1.7891 F

107.55 F

Ambient

 

 

0.001

1.0E±04

1.0E±03

1.0E±02

1.0E±01

1.0E+00

1.0E+01

1.0E+02

1.0E+03

 

 

1.0E±05

t, TIME (s)

Figure 10. Thermal Response

4

Motorola TMOS Power MOSFET Transistor Device Data

MMDF1N05E

INFORMATION FOR USING THE SO±8 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface

between the board and the package. With the correct pad geometry, the packages will self±align when subjected to a solder reflow process.

 

0.060

 

1.52

0.275

0.155

7.0

4.0

 

0.024

0.050

0.6

1.270

inches

mm

SO±8 POWER DISSIPATION

The power dissipation of the SO±8 is a function of the input pad size. These can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. Power dissipation for a surface mount device is

determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the

device junction to ambient; and the operating temperature, TA. Using the values provided on the data sheet for the SO±8 package, PD can be calculated as follows:

PD =

TJ(max) ± TA

RθJA

 

The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into

the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 2.0 Watts.

PD = 150°C ± 25°C = 2.0 Watts

62.5°C/W

The 62.5°C/W for the SO±8 package assumes the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 2.0 Watts using the footprint shown. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad . Using board material such as Thermal Clad, the power dissipation can be doubled using the same footprint.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected.

Always preheat the device.

The delta temperature between the preheat and soldering should be 100°C or less.*

When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C.

The soldering temperature and time shall not exceed 260°C for more than 10 seconds.

When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less.

After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress.

Mechanical stress or shock should not be applied during cooling

* Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.

Motorola TMOS Power MOSFET Transistor Device Data

5

MMDF1N05E

PACKAGE DIMENSIONS

 

±A±

 

M

J

 

 

 

 

 

1

4XP

B

RX 45

 

(0.010)M

 

8

5

 

 

±B±

 

 

 

 

 

 

4

0.25

 

 

 

 

 

 

G

 

 

M

 

 

 

 

 

 

 

 

F

±T±

 

C

SEATING

 

 

 

 

 

 

 

PLANE

 

K

8X D

 

 

 

 

 

0.25 (0.010) M T B S

A S

CASE 751±05

SO±8

ISSUE P

NOTES:

1.DIMENSIONS A AND B ARE DATUMS AND T IS A DATUM SURFACE.

2.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

3.DIMENSIONS ARE IN MILLIMETER.

4.DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.

5.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

6.DIMENSION D DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

 

MILLIMETERS

DIM

MIN

MAX

A

4.80

5.00

B

3.80

4.00

C

1.35

1.75

D

0.35

0.49

F

0.40

1.25

G

1.27 BSC

J

0.18

0.25

K

0.10

0.25

M

0

7

P

5.80

6.20

R

0.25

0.50

STYLE 11:

PIN 1. SOURCE 1

2.GATE 1

3.SOURCE 2

4.GATE 2

5.DRAIN 2

6.DRAIN 2

7.DRAIN 1

8.DRAIN 1

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ªTypicalº parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including ªTypicalsº must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

How to reach us:

 

USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;

JAPAN: Nippon Motorola Ltd.; Tatsumi±SPD±JLDC, 6F Seibu±Butsuryu±Center,

P.O. Box 20912; Phoenix, Arizona 85036. 1±800±441±2447 or 602±303±5454

3±14±2 Tatsumi Koto±Ku, Tokyo 135, Japan. 03±81±3521±8315

MFAX: RMFAX0@email.sps.mot.com ± TOUCHTONE 602±244±6609

ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,

INTERNET: http://Design±NET.com

51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852±26629298

MMDF1N05E/D

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