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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

MC54/74HCT00A Quad 2-Input NAND Gate with

LSTTL-Compatible Inputs

High±Performance Silicon±Gate CMOS

 

 

J SUFFIX

 

 

 

 

 

 

 

 

The MC54/74HCT00A may be used as a level converter for interfacing

14

CERAMIC PACKAGE

 

 

CASE 632±08

 

TTL or NMOS outputs to high±speed CMOS inputs.

 

 

 

 

1

 

 

 

 

The HCT00A is identical in pinout to the LS00.

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Drive Capability: 10 LSTTL Loads

 

 

 

 

N SUFFIX

 

TTL/NMOS±Compatible Input Levels

 

 

 

 

 

Outputs Directly Interface to CMOS, NMOS and TTL

 

PLASTIC PACKAGE

 

14

 

CASE 646±06

 

Operating Voltage Range: 4.5 to 5.5 V

 

 

 

 

 

 

1

 

 

 

 

Low Input Current: 1.0 μA

 

 

 

 

 

 

 

 

 

 

 

 

 

In Compliance with the Requirements Defined by JEDEC Standard

 

 

D SUFFIX

 

No. 7A

 

 

 

 

 

 

 

 

 

 

 

SOIC PACKAGE

 

Chip Complexity: 48 FETs or 12 Equivalent Gates

14

 

 

 

CASE 751A±03

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ORDERING INFORMATION

 

 

LOGIC DIAGRAM

 

 

MC54HCTXXAJ

 

Ceramic

 

 

 

 

 

MC74HCTXXAN

 

Plastic

 

A1

1

 

 

MC74HCTXXAD

 

SOIC

 

3

Y1

 

 

 

 

 

 

2

 

 

 

 

 

B1

 

 

 

 

 

 

 

 

 

 

 

 

3

A2

4

6

 

PIN ASSIGNMENT

 

Y2

 

 

 

 

B2

5

A1

1

14

VCC

 

 

Y = AB

 

 

9

 

B1

2

13

B4

 

A3

8

 

 

 

Y3

 

 

 

 

 

B3

10

Y1

3

12

A4

 

 

 

 

A2

4

11

Y4

 

 

 

 

 

 

A4

12

11

Y4

B2

5

10

B3

 

 

13

 

 

 

 

 

B4

 

Y2

6

9

A3

 

 

 

 

 

PIN 14 = VCC

 

 

GND

7

8

Y3

 

 

PIN 7 = GND

 

 

 

 

 

 

 

 

 

 

 

FUNCTION TABLE

 

 

 

 

 

 

Inputs

 

Output

 

 

 

 

 

A

B

 

Y

 

 

 

 

 

L

L

 

H

 

 

 

 

 

L

H

 

H

 

 

 

 

 

H

L

 

H

 

 

 

 

 

H

H

 

L

 

10/95

Motorola, Inc. 1995

REV 6

MC54/74HCT00A

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

 

 

 

 

VCC

DC Supply Voltage (Referenced to GND)

± 0.5 to + 7.0

V

Vin

DC Input Voltage (Referenced to GND)

± 0.5 to VCC + 0.5

V

Vout

DC Output Voltage (Referenced to GND)

± 0.5 to VCC + 0.5

V

Iin

DC Input Current, per Pin

± 20

mA

Iout

DC Output Current, per Pin

± 25

mA

ICC

DC Supply Current, VCC and GND Pins

± 50

mA

PD

Power Dissipation in Still Air, Plastic or Ceramic DIP²

750

mW

 

SOIC Package²

500

 

 

 

 

 

Tstg

Storage Temperature

± 65 to + 150

_C

TL

Lead Temperature, 1 mm from Case for 10 Seconds

 

_C

 

SOIC or Plastic Package

260

 

 

Ceramic Dip

300

 

 

 

 

 

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

²Derating Ð Plastic DIP: ± 10 mW/ _C from 65_ to 125_C

Ceramic DIP: ± 10 mW/_C from 100_ to 125_C

SOIC Package: ± 7 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

 

 

Symbol

Parameter

Min

Max

Unit

 

 

 

 

 

 

 

 

 

VCC

DC Supply Voltage (Referenced to GND)

2.0

6.0

V

3

 

Vin, Vout

DC Input Voltage, Output Voltage (Referenced to GND)

0

VCC

V

 

TA

Operating Temperature, All Package Types

± 55

+ 125

_C

 

 

tr, tf

Input Rise and Fall Time (Figure 1)

0

500

ns

DC CHARACTERISTICS FOR THE MC54/74HCT00A (Voltages Referenced to GND)

 

 

 

 

 

Guaranteed Limits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

± 55 to

 

 

 

 

 

 

 

 

 

 

 

VCC

25_C

 

v 85_C

 

v 125_C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

Test Conditions

V

Min

Max

 

Min

Max

 

Min

Max

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

Minimum High±Level

Vout = 0.1 or VCC ± 0.1 V

4.5

2.00

 

 

2.00

 

 

 

2.00

 

V

 

Input Voltage

|Iout| v 20 μA

5.5

2.00

 

 

2.00

 

 

 

2.00

 

 

VIL

Maximum Low±Level

Vout = 0.1 or VCC ± 0.1 V

4.5

 

0.80

 

 

 

0.80

 

 

0.80

V

 

Input Voltage

|Iout| v 20 μA

5.5

 

0.80

 

 

 

0.80

 

 

0.80

 

VOH

Minimum High±Level

Vin = VIH or VIL

4.5

4.40

 

 

4.40

 

 

 

4.40

 

V

 

Output Voltage

|Iout| v 20 μA

5.5

5.40

 

 

5.40

 

 

 

5.40

 

 

 

 

Vin = VIH or VIL

 

 

 

 

 

 

 

 

 

 

 

 

 

|Iout| v 4.0 mA

4.5

3.98

 

 

3.84

 

 

 

3.70

 

 

VOL

Maximum Low±Level

Vin = VIH or VIL

4.5

 

0.10

 

 

 

0.10

 

 

0.10

V

 

Output Voltage

|Iout| v 20 μA

5.5

 

0.10

 

 

 

0.10

 

 

0.10

 

 

 

Vin = VIH or VIL

 

 

 

 

 

 

 

 

 

 

 

 

 

|Iout| = 4.0 mA

4.5

 

0.26

 

 

 

0.33

 

 

0.40

 

Iin

Maximum Input Leakage

Vin = VCC or GND

5.5

 

± 0.10

 

 

 

± 1.00

 

 

± 1.00

μA

 

Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC

Maximum Quiescent Sup-

Vin = VCC or GND

5.5

 

1

 

 

 

10

 

 

40

μA

 

ply Current (per Package)

|Iout| v 0 μA

 

 

 

 

 

 

 

 

 

 

 

ICC

Additional Quiescent

Vin = 2.4 V, Any One Input

 

w± 55_C

 

 

25 to 125_C

 

 

Supply Current

Vin = VCC or GND, Other Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

lout = 0 μA

5.5

2.9

 

 

 

 

 

2.4

 

mA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

MOTOROLA

2

MC54/74HCT00A

AC CHARACTERISTICS FOR THE MC54/74HCT00A (VCC = 5.0 V ± 10%, CL = 50 pF, Input tr = tf = 6.0 ns)

 

 

 

 

Guaranteed Limits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

± 55 to 25_C

v85_C

 

v125_C

 

Symbol

Parameter

Fig.

 

 

 

 

 

 

 

Unit

Min

Max

Min

Max

 

Min

Max

 

 

 

 

 

 

 

 

 

 

 

tPLH,

Maximum Propagation Delay, Input A

1, 2

 

19

 

24

 

 

28

ns

tPHL

or B to Output Y

 

 

 

 

 

 

 

 

 

tTLH,

Maximum Output Transition

1, 2

 

15

 

19

 

 

22

ns

tTHL

Time, Any Output

 

 

 

 

 

 

 

 

 

Cin

Maximum Input Capacitance

Ð

 

10

 

10

 

 

10

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High± Speed CMOS Data Book (DL129/D).

 

 

Typical @ 25°C, VCC = 5.0 V

 

CPD

Power Dissipation Capacitance (Per Gate)*

15

pF

*Used to determine the no±load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

 

tf

tr

 

TEST POINT

 

INPUT

90%

3.0 V

 

 

 

 

 

 

 

 

 

A OR B

1.3 V

GND

 

OUTPUT

 

 

10%

 

 

 

tPLH

tPHL

DEVICE

 

 

 

 

 

UNDER

CL*

3

 

90%

 

TEST

OUTPUT Y

1.3 V

 

 

 

 

10%

 

 

 

 

tTLH

tTHL

 

 

 

 

 

 

* Includes all probe and jig capacitance

 

Figure 1. Switching Waveforms

Figure 2. Test Circuit

 

EXPANDED LOGIC DIAGRAM

(1/4 OF THE DEVICE)

A

Y

B

3

MOTOROLA

MC54/74HCT00A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OUTLINE DIMENSIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

J SUFFIX

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CERAMIC DIP PACKAGE

 

 

 

 

 

 

 

 

 

-A-

 

 

 

 

CASE 632±08

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISSUE Y

 

 

 

 

NOTES:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

 

8

 

 

 

 

 

 

 

1. DIMENSIONING AND TOLERANCING PER ANSI

 

 

 

 

 

 

 

 

 

Y14.5M, 1982.

 

 

 

 

 

 

 

 

-B-

 

 

 

 

 

2. CONTROLLING DIMENSION: INCH.

 

 

 

 

 

 

 

 

 

 

 

3. DIMENSION L TO CENTER OF LEAD WHEN

 

1

 

7

 

 

 

 

 

 

 

FORMED PARALLEL.

 

 

 

 

 

 

 

 

 

 

 

4. DIMESNION F MAY NARROW TO 0.76 (0.030)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C

L

 

 

 

 

WHERE THE LEAD ENTERS THE CERAMIC

 

 

 

 

 

 

 

 

 

BODY.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

INCHES

MILLIMETERS

 

 

 

 

 

 

 

 

 

 

 

DIM

MIN

MAX

MIN

MAX

 

 

 

 

 

 

 

 

 

 

 

A

0.750

0.785

19.05

19.94

 

 

 

 

 

 

 

 

 

 

 

B

0.245

0.280

6.23

7.11

-T-

 

 

 

 

 

K

 

 

 

 

C

0.155

0.200

3.94

5.08

 

 

 

 

 

 

 

 

 

D

0.015

0.020

0.39

0.50

SEATING

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

F

0.055

0.065

1.40

1.65

PLANE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

G

0.100 BSC

2.54 BSC

F

G

 

 

 

 

M

 

 

 

 

 

 

N

 

 

 

 

 

J

0.008

0.015

0.21

0.38

 

D 14 PL

 

 

 

 

J 14 PL

 

 

 

 

K

0.125

0.170

3.18

4.31

 

 

 

 

 

 

 

 

 

L

0.300 BSC

7.62 BSC

 

0.25 (0.010)

M

T

A

S

0.25 (0.010)

M

T

B

S

M

0°

15°

0°

15°

 

 

 

 

 

 

 

 

 

 

 

N

0.020

0.040

0.51

1.01

 

 

 

N SUFFIX

 

 

 

 

 

 

 

 

PLASTIC DIP PACKAGE

 

 

 

 

 

 

 

 

CASE 646±06

NOTES:

 

 

 

 

 

 

 

ISSUE L

1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE

14

 

8

POSITION AT SEATING PLANE AT MAXIMUM

 

 

MATERIAL CONDITION.

 

 

 

 

B

 

2. DIMENSION L TO CENTER OF LEADS WHEN

 

 

 

FORMED PARALLEL.

 

 

 

 

 

 

3. DIMENSION B DOES NOT INCLUDE MOLD

1

 

7

 

FLASH.

 

 

 

 

3

 

 

 

4. ROUNDED CORNERS OPTIONAL.

 

A

 

 

 

INCHES

MILLIMETERS

 

 

DIM

MIN

MAX

MIN

MAX

 

 

 

 

A

0.715

0.770

18.16

19.56

 

F

 

L

B

0.240

0.260

6.10

6.60

 

 

 

 

C

0.145

0.185

3.69

4.69

 

 

 

 

D

0.015

0.021

0.38

0.53

 

 

 

C

F

0.040

0.070

1.02

1.78

 

 

 

G

0.100 BSC

2.54 BSC

 

 

 

 

H

0.052

0.095

1.32

2.41

 

 

N

J

J

0.008

0.015

0.20

0.38

 

 

 

K

0.115

0.135

2.92

3.43

 

 

SEATING

K

L

0.300 BSC

7.62 BSC

 

 

M

0

10

0

10

H

G

PLANE

D

M

N

0.015

0.039

0.39

1.01

 

 

 

 

 

 

 

D SUFFIX

 

 

 

 

 

 

 

 

 

 

 

PLASTIC SOIC PACKAGE

 

 

 

 

 

 

 

 

 

 

 

 

CASE 751A±03

NOTES:

 

 

 

 

 

±A±

 

 

 

 

 

ISSUE F

1. DIMENSIONING AND TOLERANCING PER ANSI

 

 

 

 

 

 

 

 

 

Y14.5M, 1982.

 

 

 

 

 

 

 

 

 

 

 

 

2. CONTROLLING DIMENSION: MILLIMETER.

 

14

8

 

 

 

 

 

 

3. DIMENSIONS A AND B DO NOT INCLUDE

 

 

 

 

 

 

 

MOLD PROTRUSION.

 

 

 

 

 

 

 

 

 

 

 

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

 

 

 

±B±

 

P 7 PL

 

 

PER SIDE.

 

 

 

 

 

 

 

 

 

 

0.25 (0.010) M

B M

5. DIMENSION D DOES NOT INCLUDE DAMBAR

 

1

7

 

 

 

 

PROTRUSION. ALLOWABLE DAMBAR

 

 

 

 

 

 

 

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

 

 

 

 

 

 

 

 

 

IN EXCESS OF THE D DIMENSION AT

 

 

 

 

 

 

 

 

 

MAXIMUM MATERIAL CONDITION.

 

 

G

 

 

 

 

 

R X 45°

 

F

MILLIMETERS

INCHES

 

 

 

 

 

 

 

MIN

MAX

MIN

MAX

 

 

 

 

 

C

 

 

DIM

 

 

 

 

 

 

 

 

A

8.55

8.75

0.337

0.344

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

3.80

4.00

0.150

0.157

 

 

 

 

 

 

 

 

 

C

1.35

1.75

0.054

0.068

 

 

 

 

 

 

 

 

J

D

0.35

0.49

0.014

0.019

SEATING

D 14 PL

 

K

 

 

 

M

F

0.40

1.25

0.016

0.049

 

 

 

 

 

G

1.27 BSC

0.050 BSC

PLANE

 

 

 

 

 

 

 

0.25 (0.010)

 

T

B

 

A

 

 

J

0.19

0.25

0.008

0.009

 

M

S

S

 

 

 

K

0.10

0.25

0.004

0.009

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M

0°

7°

0°

7°

 

 

 

 

 

 

 

 

 

P

5.80

6.20

0.228

0.244

 

 

 

 

 

 

 

 

 

R

0.25

0.50

0.010

0.019

MOTOROLA

4

MC54/74HCT00A

3

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ªTypicalº parameters can and do vary in different applications. All operating parameters, including ªTypicalsº must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

How to reach us:

 

USA/EUROPE: Motorola Literature Distribution;

JAPAN: Nippon Motorola Ltd.; Tatsumi±SPD±JLDC, Toshikatsu Otsuki,

P.O. Box 20912; Phoenix, Arizona 85036. 1±800±441±2447

6F Seibu±Butsuryu±Center, 3±14±2 Tatsumi Koto±Ku, Tokyo 135, Japan. 03±3521±8315

MFAX: RMFAX0@email.sps.mot.com ±TOUCHTONE (602) 244±6609

HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,

INTERNET: http://Design±NET.com

51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852±26629298

CODELINE MC54/74HCT00A/D

*MC54/74HCT00A/D*

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