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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Octal D Flip-Flop with

MC74HCT273A

 

 

Common Clock and Reset

 

 

with LSTTL Compatible Inputs

 

N SUFFIX

High±Performance Silicon±Gate CMOS

20

PLASTIC PACKAGE

CASE 738±03

 

 

The MC74HCT273A may be used as a level converter for interfacing TTL

1

 

 

 

 

 

or NMOS outputs to High±Speed CMOS inputs.

 

 

DW SUFFIX

The HCT273A is identical in pinout to the LS273.

 

 

20

 

SOIC PACKAGE

This device consists of eight D flip±flops with common Clock and Reset

1

 

CASE 751D±04

inputs. Each flip±flop is loaded with a low±to±high transition of the Clock

 

 

 

 

 

input. Reset is asynchronous and active low.

 

ORDERING INFORMATION

 

 

Output Drive Capability: 10 LSTTL Loads

MC74HCTXXXAN

Plastic

TTL/NMOS Compatible Input Levels

MC74HCTXXXADW

SOIC

Outputs Directly Interface to CMOS, NMOS and TTL

Operating Voltage Range: 4.5 to 5.5 V

Low Input Current: 1.0 μA

In Compliance with the Requirements Defined by JEDEC Standard

PIN ASSIGNMENT

 

 

 

 

 

 

No. 7A

RESET

 

 

1

20

VCC

 

 

Chip Complexity: 284 FETs or 71 Equivalent Gates

 

 

 

 

 

 

Q0

 

 

2

19

Q7

 

 

D0

 

 

3

18

D7

 

 

 

 

 

 

D1

 

 

4

17

D6

 

 

 

 

 

 

 

LOGIC DIAGRAM

 

 

 

 

Q1

5

16

Q6

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

Q2

6

15

Q5

 

D0

3

Q0

 

 

 

D2

7

14

D5

 

D1

4

5

Q1

 

 

 

D3

8

13

D4

 

D2

7

6

Q2

 

 

 

Q3

9

12

Q4

DATA

D3

8

9

Q3

NONINVERTING

 

GND

10

11

CLOCK

INPUTS

 

13

12

 

 

 

 

 

 

 

D4

Q4

OUTPUTS

 

 

 

 

 

 

 

 

14

 

 

 

 

 

 

 

 

 

D5

15

Q5

 

 

 

 

 

 

 

 

D6

17

16

Q6

 

 

 

FUNCTION TABLE

 

D7

18

 

 

 

 

19

Q7

 

 

 

Inputs

 

Output

 

 

11

 

 

 

 

 

CLOCK

 

 

 

Reset

Clock

D

Q

 

 

 

 

 

 

L

 

 

X

X

L

 

 

 

 

 

 

H

 

 

 

H

H

 

RESET

1

PIN 20 = VCC

H

 

 

 

L

L

 

H

 

 

L

X

No Change

 

 

 

PIN 10 = GND

 

 

 

 

 

H

 

 

 

X

No Change

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X = Don't Care

 

 

 

 

 

 

 

 

Z = High Impedance

 

 

10/95

Motorola, Inc. 1995

REV 6

MC74HCT273A

MAXIMUM RATINGS*

Symbol

Parameter

 

Value

Unit

 

 

 

 

VCC

DC Supply Voltage (Referenced to GND)

± 0.5 to + 7.0

V

Vin

DC Input Voltage (Referenced to GND)

 

± 1.5 to VCC + 1.5

V

Vout

DC Output Voltage (Referenced to GND)

± 0.5 to VCC + 0.5

V

Iin

DC Input Current, per Pin

 

± 20

mA

Iout

DC Output Current, per Pin

 

± 25

mA

ICC

DC Supply Current, VCC and GND Pins

 

± 50

mA

PD

Power Dissipation in Still Air

Plastic DIP²

750

mW

 

SOIC Package²

500

 

 

 

 

 

 

Tstg

Storage Temperature

 

± 65 to + 150

_C

TL

Lead Temperature, 1 mm from Case for 10 Seconds

 

_C

 

(SOIC or Plastic DIP)

260

 

 

 

 

 

 

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

²Derating Ð Plastic DIP: ± 10 mW/ _C from 65_ to 125_C

SOIC Package: ± 7 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

 

 

 

 

 

VCC

DC Supply Voltage (Referenced to GND)

4.5

5.5

V

Vin, Vout

DC Input Voltage, Output Voltage (Referenced to GND)

0

VCC

V

TA

Operating Temperature, All Package Types

± 55

+ 125

_C

tr, tf

Input Rise and Fall Time (Figure 1)

0

500

ns

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

 

 

 

 

Guaranteed Limit

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

± 55 to

 

 

 

 

Symbol

Parameter

Test Conditions

V

25_C

v 85_C

v 125_C

Unit

 

 

 

 

 

 

 

 

 

VIH

Minimum High±Level Input

Vout = 0.1 V or VCC ± 0.1 V

4.5

2.0

2.0

 

2.0

V

 

Voltage

|Iout| v 20 μA

5.5

2.0

2.0

 

2.0

 

VIL

Maximum Low±Level Input

Vout = 0.1 V or VCC ± 0.1 V

4.5

0.8

0.8

 

0.8

V

 

Voltage

|Iout| v 20 μA

5.5

0.8

0.8

 

0.8

 

VOH

Minimum High±Level Output

Vin = VIH or VIL

4.5

4.4

4.4

 

4.4

V

 

Voltage

|Iout| v 20 μA

5.5

5.4

5.4

 

5.4

 

 

 

Vin = VIH or VIL

 

 

 

 

 

 

 

 

|Iout| v 4.0 mA

4.5

3.98

3.84

 

3.7

 

VOL

Maximum Low±Level Output

Vin = VIH or VIL

4.5

0.1

0.1

 

0.1

V

 

Voltage

|Iout| v 20 μA

5.5

0.1

0.1

 

0.1

 

 

 

Vin = VIH or VIL

 

 

 

 

 

 

 

 

|Iout| v 4.0 mA

4.5

0.26

0.33

 

0.4

 

Iin

Maximum Input Leakage Current

Vin = VCC or GND

5.5

± 0.1

± 1.0

 

± 1.0

μA

ICC

Maximum Quiescent Supply

Vin = VCC or GND

5.5

4.0

40

 

160

μA

 

Current (per Package)

Iout = 0 μA

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC

Additional Quiescent Supply

Vin = 2.4 V, Any One Input

 

±55_C

25_C to 125_C

 

 

Current

Vin = VCC or GND, Other Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

lout = 0 μA

5.5

2.9

2.4

 

mA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

MOTOROLA

2

MC74HCT273A

AC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ± 10%, CL = 50 pF, Input tr = tf = 6.0 ns)

 

 

 

Guaranteed Limit

 

 

 

 

 

 

 

 

 

 

 

± 55 to

 

 

 

Symbol

Parameter

Fig.

25_C

v 85_C

v 125_C

Unit

 

 

 

 

 

 

 

fmax

Maximum Clock Frequency (50% Duty Cycle)

1, 4

30

24

20

MHz

tPLH,

Maximum Propagation Delay, Clock to Q

1, 4

25

28

35

ns

tPHL

 

 

 

 

 

 

tPHL

Maximum Propagation Delay, Reset to Q

2, 4

25

28

35

ns

tTLH,

Maximum Output Transition Time, Any Output

1, 5

18

20

22

ns

tTHL

 

 

 

 

 

 

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High± Speed CMOS Data Book (DL129/D).

 

 

Typical @ 25°C, VCC = 5.0 V

 

CPD

Power Dissipation Capacitance (Per Gate)*

30

pF

*Used to determine the no±load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

TIMING REQUIREMENTS (VCC = 5.0 V ± 10%, CL = 50 pF, Input tr = tf = 6.0 ns)

 

 

 

 

 

Guaranteed Limit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

± 55 to 25_C

 

v 85_C

 

v 125_C

 

Symbol

Parameter

Fig.

 

 

 

 

 

 

 

 

Unit

Min

Max

 

Min

Max

 

Min

Max

 

 

 

 

 

 

 

 

 

 

 

 

tsu

Minimum Setup Time, Data to Clock

3

10

 

 

12

 

 

15

 

ns

 

 

 

 

 

th

Minimum Hold Time, Clock to Data

3

3.0

 

 

3.0

 

 

3.0

 

ns

trec

Minimum Recovery Time, Set or Reset Inactive to Clock

2

5.0

 

 

5.0

 

 

5.0

 

ns

tw

Minimum Pulse Width, Clock

1

12

 

 

15

 

 

18

 

ns

tw

Minimum Pulse Width, Set or Reset

2

12

 

 

15

 

 

18

 

ns

 

 

 

 

 

tr, tf

Maximum Input Rise and Fall Times

1

 

500

 

 

500

 

 

500

ns

3

MOTOROLA

MC74HCT273A

 

 

 

 

 

SWITCHING WAVEFORMS

 

 

t

t

 

tw

 

r

f

 

3.0 V

 

2.7 V

3.0 V

 

 

1.3 V

 

CLOCK

RESET

 

1.3 V

 

GND

 

0.3 V

GND

 

 

 

tPHL

 

tw

 

 

 

1/fmax

Q

 

1.3 V

 

tPLH

tPHL

 

trec

 

90%

 

 

Q

1.3 V

 

 

3.0 V

 

10%

CLOCK

 

1.3 V

 

 

 

 

tTLH

tTHL

 

GND

 

 

 

Figure 1.

Figure 2.

TEST POINT

 

 

VALID

DATA

1.3 V

 

 

tsu

th

CLOCK

 

1.3 V

 

 

 

 

 

OUTPUT

 

 

 

 

 

 

 

 

 

 

 

 

 

3.0 V

 

DEVICE

 

 

 

 

 

 

 

 

 

GND

 

UNDER

 

 

 

 

 

 

 

 

CL*

 

TEST

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3.0 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

* Includes all probe and jig capacitance

 

Figure 3.

Figure 4. Test Circuit

 

EXPANDED LOGIC DIAGRAM

 

 

 

 

C

2

 

 

D0

3

D R Q

 

Q0

 

 

 

C

5

 

 

D1

4

D R Q

 

Q1

 

 

 

C

6

 

 

D2

7

D R Q

 

Q2

 

 

 

C

9

 

 

D3

8

D R Q

 

Q3

NONINVERTING

DATA

 

 

 

 

OUTPUTS

INPUTS

 

C

 

 

 

12

 

 

 

 

 

 

D4

13

D R Q

 

Q4

 

 

 

C

15

 

 

D5

14

D R Q

 

Q5

 

 

 

C

16

Q6

 

D6

17

D R Q

 

 

 

 

C

19

 

 

D7

18

D R Q

 

Q7

 

CLOCK

11

 

 

 

 

RESET

1

 

 

 

 

MOTOROLA

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MC74HCT273A

 

 

 

 

 

 

 

OUTLINE DIMENSIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

N SUFFIX

 

 

 

 

 

 

 

 

 

 

±A±

 

 

 

 

PLASTIC PACKAGE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CASE 738±03

 

 

NOTES:

 

 

 

 

 

 

 

 

 

 

 

 

 

ISSUE E

 

 

1. DIMENSIONING AND TOLERANCING PER ANSI

20

 

 

 

 

 

11

 

 

 

 

Y14.5M, 1982.

 

 

 

 

 

 

 

 

 

 

 

B

 

 

 

2. CONTROLLING DIMENSION: INCH.

 

 

 

 

 

 

 

 

 

 

 

3. DIMENSION L TO CENTER OF LEAD WHEN

1

 

 

 

 

 

10

 

 

 

 

 

FORMED PARALLEL.

 

 

 

 

 

 

 

 

 

 

 

 

4. DIMENSION B DOES NOT INCLUDE MOLD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C

L

 

 

 

FLASH.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

INCHES

 

MILLIMETERS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIM

MIN

MAX

 

MIN

MAX

 

 

 

 

 

 

 

 

 

 

 

 

A

1.010

1.070

25.66

27.17

±T±

 

 

 

 

 

 

 

 

 

 

 

B

0.240

0.260

 

6.10

6.60

 

 

 

 

 

 

K

 

 

 

 

C

0.150

0.180

 

3.81

4.57

SEATING

 

 

 

 

 

 

 

 

 

 

D

0.015

0.022

 

0.39

0.55

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M

 

 

 

E

0.050 BSC

 

1.27 BSC

PLANE

 

 

 

 

 

 

 

 

 

 

 

E

 

 

 

 

N

 

 

 

 

F

0.050

0.070

 

1.27

1.77

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

G

0.100 BSC

 

2.54 BSC

G

F

 

 

 

 

 

 

 

 

 

 

J

0.008

0.015

 

0.21

0.38

 

 

 

 

 

 

J 20 PL

 

 

 

K

0.110

0.140

 

2.80

3.55

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D 20 PL

 

0.25 (0.010) M

T

B

M

L

0.300 BSC

 

7.62 BSC

 

 

 

 

 

 

M

0

15

 

0

15

 

 

 

 

 

 

0.25 (0.010) M T

A M

 

 

 

N

0.020

0.040

 

0.51

1.01

 

 

 

 

 

 

 

 

DW SUFFIX

 

 

 

 

 

 

 

 

 

 

±A±

 

 

 

 

 

PLASTIC SOIC PACKAGE

 

 

NOTES:

 

 

 

 

 

 

 

 

 

 

 

 

CASE 751D±04

 

 

1. DIMENSIONING AND TOLERANCING PER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ANSI Y14.5M, 1982.

 

 

 

 

20

 

 

 

11

 

 

 

ISSUE E

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2. CONTROLLING DIMENSION: MILLIMETER.

 

 

 

 

 

 

 

 

 

 

 

3. DIMENSIONS A AND B DO NOT INCLUDE

 

 

 

 

 

 

 

 

 

 

 

 

MOLD PROTRUSION.

 

 

 

 

 

 

 

 

±B±

10X P

 

 

 

 

4. MAXIMUM MOLD PROTRUSION 0.150

 

 

 

 

 

 

 

 

 

(0.006) PER SIDE.

 

 

 

 

 

 

 

 

 

 

 

0.010 (0.25) M

B M

 

 

5. DIMENSION D DOES NOT INCLUDE

 

 

 

 

 

 

 

 

 

 

DAMBAR PROTRUSION. ALLOWABLE

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

10

 

 

 

 

 

 

DAMBAR PROTRUSION SHALL BE 0.13

 

 

 

 

 

 

 

 

 

 

(0.005) TOTAL IN EXCESS OF D DIMENSION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AT MAXIMUM MATERIAL CONDITION.

 

20X D

 

 

 

 

 

J

 

 

 

 

MILLIMETERS

INCHES

 

 

0.010 (0.25) M

T

A

 

B

 

 

 

 

DIM

MIN

MAX

MIN

MAX

 

 

S

S

 

 

 

 

A

12.65

12.95

0.499

0.510

 

 

 

 

 

 

 

 

 

 

 

B

7.40

7.60

0.292

0.299

 

 

 

 

 

 

 

F

 

 

 

C

2.35

2.65

0.093

0.104

 

 

 

 

 

 

 

 

 

 

D

0.35

0.49

0.014

0.019

 

 

 

 

 

 

 

 

 

 

 

F

0.50

0.90

0.020

0.035

 

 

 

 

 

 

 

 

R X 45

 

 

G

1.27 BSC

 

0.050 BSC

 

 

 

 

 

 

 

 

 

 

 

J

0.25

0.32

0.010

0.012

 

 

 

 

 

 

 

 

 

 

 

K

0.10

0.25

0.004

0.009

 

 

 

 

 

 

 

 

 

 

 

M

0

7

 

0

7

 

 

 

 

 

 

C

 

 

 

 

 

P

10.05

10.55

0.395

0.415

 

 

 

 

 

 

 

 

 

 

R

0.25

0.75

0.010

0.029

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

±T±

SEATING

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PLANE

M

 

 

 

 

 

 

 

 

 

 

18X G

 

 

 

K

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ªTypicalº parameters can and do vary in different applications. All operating parameters, including ªTypicalsº must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

How to reach us:

 

USA/EUROPE: Motorola Literature Distribution;

JAPAN: Nippon Motorola Ltd.; Tatsumi±SPD±JLDC, Toshikatsu Otsuki,

P.O. Box 20912; Phoenix, Arizona 85036. 1±800±441±2447

6F Seibu±Butsuryu±Center, 3±14±2 Tatsumi Koto±Ku, Tokyo 135, Japan. 03±3521±8315

MFAX: RMFAX0@email.sps.mot.com ±TOUCHTONE (602) 244±6609

HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,

INTERNET: http://Design±NET.com

51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852±26629298

CODELINE MC74HCT273A/D

*MC74HCT273A/D*

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