Current Symbol Inputs

Signal Name

Type

State During

Signal Description

Reset

EXTS1

Input

Input

External Symbol 1—This is the Most Significant Bit

(MSB) of the symbol being tested.

EXTS0

Input

Input

External Symbol 0—This is the Least Significant Bit (LSB)

of the symbol being tested.

Signal

Signal

State during

Signal Description

Name

Type

Reset

SCK

Input

Input

SPI Serial Clock—The SCK signal is an input, and the clock

signal from the external master synchronizes the data

transfer. The SCK signal is ignored by the SPI if the Slave

Select

(SS)

signal is not asserted.

Input

Input

SPI Slave Select—This signal is used to enable the SPI slave

SS

for transfer.

MOSI

Output

Tri-stated

SPI Master-Out-Slave-In—When the SPI is configured as a

slave, MOSI is the master data output line. The MOSI signal

is used in conjunction with the MISO signal for transmitting

and receiving serial data.

MISO

Input

Input

SPI Master-In-Slave-Out— The MISO signal is used in

conjunction with the MOSI signal for transmitting and

receiving serial data. This signal is an input when configured

for the SPI Master mode.

Output

Output,

SPI Ready—This signal is driven low when the FLEXchip IC

READY

driven high

is ready for an SPI packet.

Signal

Signal Type

State during

Signal Description

Name

Reset

S0–S7

Output

Tri-stated

Serial Port 0–Serial Port 7—These signals are the

eight tri-state receiver control ports.

1-4

MC68175/D, Preliminary

MOTOROLA