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SPI Packets

Decoder-to-Host Packet Descriptions

Table B-25 Address Packet Bit Assignments

Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

0

0

0

0

0

0

0

1

 

 

 

 

 

 

 

 

 

2

PA

p1

p0

LA

x

x

x

x

 

 

 

 

 

 

 

 

 

1

AI7

AI6

AI5

AI4

AI3

AI2

AI1

AI0

 

 

 

 

 

 

 

 

 

0

TOA

WN6

WN5

WN4

WN3

WN2

WN1

WN0

 

 

 

 

 

 

 

 

 

PRIORITY ADDRESS (PA)

This bit is set if the address was received as a priority address.

PHASE (p)

These bits identify the phase on which the address was detected (0 = a, 1 = b, 2 = c, 3 = d).

LONG ADDRESS TYPE (LA)

This bit is set if the address was programmed in the FLEXchip IC as a long address.

ADDRESS INDEX (AI)

Valid values are 0 through 15 and 128 through 143. The index identifies which of the addresses was detected. Values 0 through 15 will correspond to the sixteen programmable address words. Values 128 through 143 will correspond to the sixteen temporary addresses. For long addresses, the address detect packet will only be sent once and the index will refer to the second word of the address.

TONE ONLY ADDRESS (TOA)

This bit is set if the address was programmed in the FLEXchip IC as a tone-only address. No vector word will be sent for tone-only addresses.

WORD NUMBER (WN) OF VECTOR (2–87)

These bits describe the location in the frame of the vector word for the detected address. This value is invalid for this packet if the TOA bit is set.

UNUSED BITS (X)

The value of these bits is not guaranteed.

B-24

MC68175/D, Preliminary

MOTOROLA

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