SPI Packets

Host-to-Decoder Packet Descriptions

Receiver Shut Down Setting Packets

Table B-17 Receiver Shut Down Setting Packet Bit Assignments

SETTING NUMBER (s)

These bits define the receiver control setting for which this packet’s values are to be applied. The following truth table shows the names of each of the values for “s” that apply to this packet.

Table B-18 Setting Number Bit Definitions

STEP ENABLE (SE)

The receiver setting is enabled when the bit is set. If a step in the shut down sequence is disabled, all steps following the disabled step will be ignored. The value after reset = 0.

LOW BATTERY CHECK (LBC)

If this bit is set, the FLEXchip IC will check the status of the LOBAT port just before leaving this receiver state. The value after reset = 0.

CONTROL LINE SETTING (CLS)

This is the value to be output on the receiver control lines (S0–S7) for this receiver state. The value after reset = 0.

STEP TIME (ST)

This is the time the FLEXchip IC is to wait before applying the next state’s receiver control value to the receiver control lines. The setting is in steps of 625us.

Valid values are 625 s (ST = 01) to 39.375 ms (ST = 3F in hexadecimal). (The value after reset = 625 s.)