SPI Packets

Host-to-Decoder Packet Descriptions

Table B-2 Decoder-to-Host Packet ID Map (Continued)

Packet ID

Packet Type

(Hexadecimal)

80–FE Reserved

HOST-TO-DECODER PACKET DESCRIPTIONS

The following sections describe the packets of information sent from the host to the FLEXchip IC. In all cases the packets should be sent MSB first (Bit 7 of byte 3 = Bit 31 of the packet = MSB).

Checksum Packet

The Checksum Packet is used to insure proper communication between the host and the FLEXchip IC. The FLEXchip IC exclusive-ORs the 24 data bits of every packet it receives (except the Checksum Packet and the special packet ID’s 1C through 1F hexadecimal) with an internal checksum register. Upon reset and whenever the host writes a packet to the FLEXchip IC, the FLEXchip IC is disabled from sending any information to the host processor until the host processor sends a Checksum Packet with the proper Checksum Value (CV) to the FLEXchip IC. When the FLEXchip IC is disabled in this way, it prompts the host to read the Part ID Packet. Note that all other operation continues normally when the FLEXchip IC is “disabled”. The FLEXchip IC is only disabled in the sense that the data cannot be read from the FLEXchip IC, all other operations continue to function.

When the FLEXchip IC is reset, it is disabled and the internal checksum register is initialized to the 24-bit part ID defined in the Part ID Packet. (See Part ID Packet on page B-34.) Every time a packet other than the Checksum Packet and the special packets 1C through 1F is sent to the decoder IC, the value sent in the 24 information bits is exclusive-ORed with the internal checksum register, the result is stored back to the checksum register, and the FLEXchip IC is disabled. If a Checksum Packet is sent and the CV bits match the bits in the checksum register, the FLEXchip IC is enabled. If a Checksum Packet is sent when the FLEXchip IC is already enabled, the packet is ignored by the FLEXchip IC, in which case a null packet having the ID and data bits set to 0 is suggested. If a packet other than the Checksum Packet is sent when the FLEXchip IC is enabled, the decoder IC will be disabled until a Checksum Packet is sent with the correct CV bits.

SPI Packets

Host-to-Decoder Packet Descriptions

RESET

FLEXchip disables itself

FLEXchip initializes checksum register to Part ID value

FLEXchip initiates

Part ID Packet

When the host reads a packet out of the FLEXchip IC but has no data to send, the Checksum Packet should be sent so the FLEXchip IC will not be disabled. The data in the Checksum Packet could be a null packet, 32-bit stream of all 0s, since a Checksum Packet will not disable the FLEXchip IC. When the host re-configures the FLEXchip IC, the FLEXchip IC will be disabled from sending any packets other than the Part ID Packet until the FLEXchip IC is enabled with a Checksum Packet having the proper data. The ID of the Checksum Packet is 0.