SPI Packets

Decoder-to-Host Packet Descriptions

DECODER-TO-HOST PACKET DESCRIPTIONS

The following sections describe the packets of information that will be sent from the FLEXchip IC to the host. In all cases the packets are sent MSB first (Bit 7 of byte 3 = Bit 31 of the packet = MSB). The FLEXchip IC decides what data should be sent to the host. If the FLEXchip IC is disabled through the checksum feature (see Checksum Packet on page B-6), the Part ID Packet will be sent. Data Packets relating to data received over the air are buffered in the 32 packet transmit buffer. The Data packets include Block Information Word Packets, Address Packets, Vector Packets, and Message Packets. If the FLEXchip IC is enabled and there is data in the transmit buffer, a packet from the transmit buffer will be sent. If the FLEXchip IC is enabled and no Data Packet or Part ID Packet is pending, the FLEXchip IC will send the Status Packet (which is not buffered). In the event of a buffer overflow, the FLEXchip IC will automatically stop decoding and clear the buffer information.

32

Part ID Register

Figure B-5 FLEXchip IC SPI Transmit Functional Block Diagram

Block Information Word Packet

The Block Information Field is the first field following the synchronization codes of the FLEX protocol (see Appendix A). This field contains information about the frame such as number of addresses and messages, as well as information about current time. The first block information word of each phase is used internally to the FLEXchip IC and is never transmitted to the host.

All time and date block information words (f = 001, 010, or 101) can be optionally sent to the host by setting the SBI bit in the control packet. (see Control Packet on page B-10.) When the SBI bit is set and a block information word is received