harris / CA3083
.PDF
S E M I C O N D U C T O R
March 1993
CA3083
General Purpose High Current
N-P-N Transistor Array
Features
• High IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
100mA Max |
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Low VCE sat (at 50mA) . . . . . . . . . . . . . . . . . |
. . 0.7V Max |
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Matched Pair (Q1 and Q2) |
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VIO (VBE Matched) . . . . . . . . . . . . . . . . . . . . . |
. ±5mV Max |
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IIO (at 1mA) . . . . . . . . . . . . . . . . . . . . . . . . . |
2.5μA Max |
• 5 Independent Transistors Plus Separate Substrate
Connection
Description
The CA3083 is a versatile array of five high current (to 100mA) n-p-n transistors on a common monolithic substrate. In addition, two of these transistors (Q1 and Q2) are matched at low current (i.e. 1mA) for applications in which offset parameters are of special importance.
Independent connections for each transistor plus a separate terminal for the substrate permit maximum flexibility in circuit design.
Applications
•Signal Processing and Switching Systems Operating from DC to VHF
•Lamp and Relay Driver
•Differential Amplifier
•Temperature Compensated Amplifier
•Thyristor Firing
•See Application Note AN5296 “Applications of the CA3018 Circuit Transistor Array” for Suggested Applications
Ordering Information
PART |
TEMPERATURE |
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NUMBER |
RANGE |
PACKAGE |
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CA3083 |
-55oC to +125oC |
16 Lead Plastic DIP |
CA3083F |
-55oC to +125oC |
16 Lead Ceramic DIP |
CA3083M |
-55oC to +125oC |
16 Lead Narrow Body SOIC |
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CA3083M96 |
-55oC to +125oC |
16 Lead Narrow Body SOIC* |
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* Denotes Tape and Reel
Pinout
CA3083
(PDIP, CDIP 150mil SOIC)
TOP VIEW
1 |
16 |
2 |
Q1 |
15 |
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3 |
14 |
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4 |
Q2 |
13 |
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SUBSTRATE |
5 |
Q5 |
12 |
6 |
11 |
7 |
Q3 |
10 |
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8 |
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Q4 |
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9 |
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. |
File Number 481.2 |
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Copyright © Harris Corporation 1993
6-24
Specifications CA3083
Absolute Maximum Ratings (T |
= +25oC) |
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Operating Conditions |
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A |
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The following ratings apply for each transistor in the device: |
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Operating Temperature Range . . . . . . . . . . . . |
-55oC ≤ T |
≤ +125oC |
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A |
≤ +150oC |
Collector-to-Emitter Voltage, V . . . . . . |
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. . . 15V |
Storage Temperature Range. . . . . . . . . . . . . . |
-65oC ≤ T |
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CEO |
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20V |
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A |
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Collector-to-Base Voltage, VCBO . . . . . . . |
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Collector-to-Substrate Voltage, VCIO (Note 1) . . . . . . . . . . . . |
. . 20V |
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Emitter-to-Base Voltage, VEBO . . . . . . . . . |
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. . . 5V |
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Collector Current (IC) . . . . . . . . . . . . . . . . |
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100mA |
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Base Current (IB) . . . . . . . . . . . . . . . . . . . |
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. 20mA |
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Power Dissipation |
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Any One Transistor . . . . . . . . . . . . . . . . |
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500mW |
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Total Package . . . . . . . . . . . . . . . . . . . . |
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750mW |
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T > +55oC . . . . . . . . . . . . . . . . . . . . . . |
. . . Derate at 6.67mW/oC |
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A |
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+175oC |
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Junction Temperature . . . . . . . . . . . . . . . . |
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Junction Temperature (Plastic Package) . |
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+150oC |
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Lead Temperature (Soldering 10 Sec.). . . |
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+300oC |
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CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications T = +25oC. For Equipment Design |
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LIMITS |
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PARAMETERS |
SYMBOL |
TEST CONDITIONS |
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TYP |
MAX |
UNITS |
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FOR EACH TRANSISTOR |
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Collector-to-Base Breakdown Voltage |
V(BR)CBO |
IC = 100μA, IE = 0 |
20 |
60 |
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V |
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Collector-to-Emitter Breakdown Voltage |
V(BR)CEO |
IC = 1mA, IB = 0 |
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15 |
24 |
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V |
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Collector-to-Substrate Breakdown Voltage |
V(BR)CIO |
ICI = 100μA, IB = 0, IE = 0 |
20 |
60 |
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V |
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Emitter-to-Base Breakdown Voltage |
V(BR)EBO |
IE = 500μA, IC = 0 |
5 |
6.9 |
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V |
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Collector-Cutoff-Current |
ICEO |
VCE = 10V, IB = 0 |
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10 |
μA |
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Collector-Cutoff-Current |
ICBO |
VCB = 10V, IE = 0 |
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1 |
μA |
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DC Forward-Current Transfer Ratio (Note 2) (Figure 1) |
hFE |
VCE = 3V |
IC = 10mA |
40 |
76 |
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IC = 50mA |
40 |
75 |
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Base-to-Emitter Voltage (Figure 2) |
VBE |
VCE = 3V, IC = 10mA |
0.65 |
0.74 |
0.85 |
V |
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Collector-to-Emitter Saturation Voltage (Figures 3, 4) |
VCE SAT |
IC = 50mA, IB = 5mA |
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0.40 |
0.70 |
V |
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Gain Bandwidth Product |
fT |
VCE = 3V, IC = 10mA |
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450 |
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MHz |
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FOR TRANSISTORS Q1 AND Q2 (As a Differential Amplifier) |
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Absolute Input Offset Voltage (Figure 6) |
|VIO| |
VCE = 3V, IC = 1mA |
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1.2 |
5 |
mV |
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Absolute Input Offset Current (Figure 7) |
|IIO| |
VCE = 3V, IC = 1mA |
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0.7 |
2.5 |
μA |
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NOTE: |
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1.The collector of each transistor of the CA3083 is isolated from the substrate by an integral diode. The substrate must be connected to a voltage which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action. To avoid undesired coupling between transistors, the substrate terminal (5) should be maintained at either DC or signal (AC) ground. A suitable bypass capacitor can be used to establish a signal ground.
2.Actual forcing current is via the emitter for this test.
6-25
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CA3083 |
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Typical Performance Curves |
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100 |
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0.9 |
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TRANSFER RATIO |
VCE = 3V |
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VCE = 3V |
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90 |
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TA = +70oC |
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VOLTAGE (V) |
0.8 |
T |
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= 0oC |
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A |
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T = +25oC |
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80 |
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T = +25oC |
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CURRENT |
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-EMITTER |
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A |
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T |
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= 0oC |
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0.7 |
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70 |
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T |
= +70oC |
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FORWARD |
60 |
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BASE-TO |
0.6 |
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DC |
50 |
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0.5 |
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0.1 |
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10 |
100 |
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0.1 |
1 |
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10 |
100 |
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COLLECTOR CURRENT (mA) |
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COLLECTOR CURRENT (mA) |
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FIGURE 1. hFE vs IC |
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FIGURE 2. VBE vs IC |
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COLLECTOR-TO-EMITTER SATURATION VOLTAGE (V) |
1 |
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COLLECTOR-TO-EMITTER SATURATION VOLTAGE (V) |
1.2 |
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hFE = 10, TA = +25oC |
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hFE = 10, TA = +70oC |
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0.8 |
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1 |
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0.6 |
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0.8 |
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0.6 |
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0.4 |
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MAXIMUM |
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0.4 |
MAXIMUM |
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0.2 |
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0.2 |
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TYPICAL |
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TYPICAL |
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0 |
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0 |
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1 |
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10 |
100 |
1 |
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10 |
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100 |
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COLLECTOR CURRENT (mA) |
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COLLECTOR CURRENT (mA) |
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FIGURE 3. V |
CE SAT |
vs I AT +25oC |
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FIGURE 4. V |
CE SAT |
vs I |
C |
AT +70oC |
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C |
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(V) |
1 |
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hFE = 10, TA = +25oC |
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ABSOLUTE INPUT OFFSET VOLTAGE (mV) |
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VCE = 3V, TA = +25oC |
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BASE-TO-EMITTER SATURATION VOLTAGE |
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0.9 |
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5 |
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0.8 |
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3 |
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0.7 |
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0.6 |
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0.5 |
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0 |
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1 |
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10 |
100 |
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0.1 |
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1 |
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COLLECTOR CURRENT (mA) |
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COLLECTOR CURRENT (mA) |
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FIGURE 5. VBE SAT vs IC |
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FIGURE 6. VIO vs IC (TRANSISTORS Q1 AND Q2 AS A |
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DIFFERENTIAL AMPLIFIER) |
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6-26 |
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CA3083
Typical Performance Curves (Continued)
ABSOLUTE INPUT OFFSET CURRENT (μA)
10
VCE = 3V, TA = +25oC
1
0.1
0.1 |
1 |
10 |
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COLLECTOR CURRENT (mA) |
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FIGURE 7. IIO vs IC (TRANSISTORS Q1 AND Q2 AS A DIFFERENTIAL AMPLIFIER)
6-27