Материалы к лабораторным работам / ГОСТы / Library Expert Surface Mount Families
.pdf
Library Expert Surface Mount Families
Pull back Quad Flat No lead (PQFN) |
|
|
|
|
|
|
|
Pull back Quad Flat No Lead |
|
PQFN Land Pattern |
PQFN Land Pattern |
|
|
Zero Rotation A |
Zero Rotation B |
|
|
|
|
Pull back Quad Flat No lead (PQFN) with Thermal Tab |
|
|
|
|
|
PQFN with Thermal Tab |
PQFN with Tab Land Pattern |
PQFN with Tab Land Pattern |
|
Zero Rotation A |
Zero Rotation B |
|
|
|
Small Outline No Lead and Quad Flat No Lead with Pullback (unit: mm)
|
|
Lead Part |
|
Most |
Nominal |
Least |
|
|
|
|
Density Level A |
Density Level B |
Density Level C |
|
|
|
|
|
|
|
|||
|
|
Periphery |
0.05 |
0.00 |
0.05 |
|
|
|
|
Round off factor |
Round off to the nearest |
two place decimal, i.e., 1.00, 1.01, 1.02, 1.03 |
|
||
|
|
Courtyard excess |
0.40 |
0.20 |
0.10 |
|
|
|
Dual Flat No Lead (DFN) Less than 1608 (0603) |
|
|
Periphery |
0.04 |
0.04 |
0.04 |
Round off factor |
Round off to the nearest |
two place decimal, i.e., 1.00, 1.01, 1.02, 1.03 |
|
Courtyard excess |
0.20 |
0.15 |
0.10 |
https://twitter.com/pcblibraries |
© 2014 2019 PCB Libraries, Inc. |
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
http://www.PCBLibraries.com/forum |
updated 10 21 18 |
Library Expert Surface Mount Families
Land Grid Array (LGA) |
|
|
|
|
|
Land Grid Array |
LGA Land Pattern |
LGA Land Pattern |
|
Zero Rotation A |
Zero Rotation B |
|
|
|
Land Grid Array (LGA) (unit: mm)
|
Lead Part |
|
|
|
Maximum (Most) |
Median (Nominal) |
Minimum (Least) |
||
|
|
|
|
Density Level A |
Density Level B |
Density Level C |
|||
|
|
|
|
|
|||||
|
Periphery |
|
|
0.05 |
0.00 |
|
0.05 |
||
|
Round off factor |
|
Round off to the nearest |
two place decimal, i.e., 1.00, 1.01, 1.02, 1.03 |
|||||
|
Courtyard excess |
|
|
0.40 |
0.20 |
|
0.10 |
||
Leadless Chip Carrier (LCC) |
|
|
|
|
|
|
|||
|
|
|
|
|
|
||||
|
Leadless Chip Carrier |
|
LCC Land Pattern |
|
LCC Land Pattern |
||||
|
|
|
|
|
|
Zero Rotation A |
|
Zero Rotation B |
|
|
|
|
|
|
|
|
|
|
|
Leadless Chip Carrier (LCC) (unit: mm)
|
Lead Part |
|
Most |
Nominal |
|
Least |
|
|
Density Level A |
Density Level B |
|
Density Level C |
|
|
|
|
|
|||
|
Heel (JH) (to find Z dim) |
0.06 |
0.04 |
|
0.02 |
|
|
Toe (JT) (to find G dim) |
0.60 |
0.50 |
|
0.40 |
|
|
Side (JS) |
0.00 |
0.02 |
|
0.04 |
|
|
Round off factor |
Round off to the nearest |
two place decimal, i.e., 1.00, 1.05, 1.10, 1.15 |
|||
|
Courtyard excess |
0.40 |
0.20 |
|
0.10 |
|
|
https://twitter.com/pcblibraries |
|
© 2014 2019 PCB Libraries, Inc. |
|||
|
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
||||
|
http://www.PCBLibraries.com/forum |
|
|
updated 10 21 18 |
||
Library Expert Surface Mount Families
Resistor, Side Concave Chip Array (RESCAV) |
|
|
|
|
|
Concave Chip Array Resistor |
Chip Array Land Pattern |
Chip Array Land Pattern |
|
Zero Rotation A |
Zero Rotation B |
|
|
|
Inductor, Side Flat Chip Array (INDCAV) |
|
|
|
|
|
|
|
Side Flat Chip Array Inductor |
|
Chip Array Land Pattern |
Chip Array Land Pattern |
|
|
Zero Rotation A |
Zero Rotation B |
|
|
|
|
Resistor, Side Concave Chip Array 4 Sided (RESCAV) |
|
|
|
|
|
Example of 3D STEP model |
Chip Array Land Pattern |
Chip Array Land Pattern |
|
Zero Rotation A |
Zero Rotation B |
|
|
|
https://twitter.com/pcblibraries |
© 2014 2019 PCB Libraries, Inc. |
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
http://www.PCBLibraries.com/forum |
updated 10 21 18 |
Library Expert Surface Mount Families
Resistor, Convex Chip Array Type E (RESCAXE) |
|
|
|
|
|
Convex Chip Array Type E |
Chip Array Land Pattern |
Chip Array Land Pattern |
|
Zero Rotation A |
Zero Rotation B |
|
|
|
Resistor, Convex Chip Array Type S (RESCAXS) |
|
|
|
|
|
Convex Chip Array Type S |
Chip Array Land Pattern |
Chip Array Land Pattern |
|
Zero Rotation A |
Zero Rotation B |
|
|
|
|
Side Flat/Concave/Convex Terminals (unit: mm) |
|
|
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
Side Lead |
|
|
|
Least Density Level |
|
|
||||
|
Terminal Lead Spacing |
|
|
Toe |
Heel |
|
|
|
|
|
Courtyard |
|
|
|
|
Side |
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
Pitch > 2.54 mm |
|
0.45 |
0.02 |
|
|
|
0.04 |
|
0.10 |
|
|
Pitch > 1.27 and <= 2.54 mm |
|
|
0.40 |
0.00 |
|
|
|
0.04 |
|
0.10 |
|
Pitch > 0.80 and <= 1.27 mm |
|
0.35 |
0.02 |
|
|
0.05 |
|
0.10 |
||
|
Pitch > 0.65 and <= 0.80 mm |
|
|
0.25 |
0.04 |
|
|
|
0.06 |
|
0.10 |
|
Pitch > 0.50 and <= 0.65 mm |
|
0.20 |
0.05 |
|
|
0.07 |
|
0.10 |
||
|
Pitch > 0.40 and <= 0.50 mm |
|
|
0.15 |
0.06 |
|
|
|
0.07 |
|
0.10 |
|
Pitch <= 0.40 mm |
|
0.10 |
0.07 |
|
|
0.07 |
|
0.10 |
||
https://twitter.com/pcblibraries |
© 2014 2019 PCB Libraries, Inc. |
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
http://www.PCBLibraries.com/forum |
updated 10 21 18 |
Library Expert Surface Mount Families
Side Lead |
|
|
Nominal Density Level |
|
|
Terminal Lead Spacing |
|
Toe |
Heel |
Side |
Courtyard |
|
|
|
|
|
|
Pitch > 2.54 mm |
|
0.55 |
0.04 |
0.01 |
0.20 |
Pitch > 1.27 and <= 2.54 mm |
|
0.50 |
0.02 |
0.02 |
0.20 |
Pitch > 0.80 and <= 1.27 mm |
|
0.45 |
0.00 |
0.03 |
0.20 |
Pitch > 0.65 and <= 0.80 mm |
|
0.35 |
0.02 |
0.04 |
0.20 |
Pitch > 0.50 and <= 0.65 mm |
|
0.30 |
0.03 |
0.05 |
0.20 |
Pitch > 0.40 and <= 0.50 mm |
|
0.25 |
0.04 |
0.05 |
0.20 |
Pitch <= 0.40 mm |
|
0.20 |
0.05 |
0.05 |
0.20 |
Side Lead |
|
|
Most Density Level |
|
||
Terminal Lead Spacing |
|
Toe |
Heel |
|
Side |
Courtyard |
|
|
|
|
|
|
|
Pitch > 2.54 mm |
|
0.65 |
0.06 |
0.01 |
0.40 |
|
Pitch > 1.27 and <= 2.54 mm |
|
0.60 |
0.04 |
0.00 |
0.40 |
|
Pitch > 0.80 and <= 1.27 mm |
|
0.55 |
0.02 |
|
0.01 |
0.40 |
Pitch > 0.65 and <= 0.80 mm |
|
0.45 |
0.00 |
|
0.02 |
0.40 |
Pitch > 0.50 and <= 0.65 mm |
|
0.40 |
0.01 |
|
0.03 |
0.40 |
Pitch > 0.40 and <= 0.50 mm |
|
0.35 |
0.02 |
|
0.03 |
0.40 |
Pitch <= 0.40 mm |
|
0.30 |
0.03 |
|
0.03 |
0.40 |
https://twitter.com/pcblibraries |
© 2014 2019 PCB Libraries, Inc. |
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
http://www.PCBLibraries.com/forum |
updated 10 21 18 |
Library Expert Surface Mount Families
Component Terminal Lead Forms
Ball Grid Array |
Land Grid Array/Bottom Only Column Grid Array |
Cylindrical End Cap |
Inward L Lead |
Outward L Lead |
J Lead |
Gull Wing |
Side Concave |
Corner Concave |
Flat No Lead Side |
Flat Lead |
Under Body Outward L |
Inward Flat Ribbon L |
Rectangular End Cap |
Through Hole |
https://twitter.com/pcblibraries |
© 2014 2019 PCB Libraries, Inc. |
||
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
||
http://www.PCBLibraries.com/forum |
|
updated 10 21 18 |
|
Library Expert Surface Mount Families
Polarity Marking Legend
The goal of the Polarity Marking Legend is to aid assembly to avoid polarized component packages from being inverted during the assembly machine setup or manual solder process. Therefore, Polarity Marking is only necessary on land patterns that require a specific rotation during the assembly process. For very dense part placements, the polarity marker can be placed under the package and covered up during the assembly process. However, the best practice is to locate the polarity indicator outside the package so that it is visible after the assembly process to allow the end user to visually validate that the assembly insertion process is correct. This is typically known as “Post Assembly Inspection Process”.
Polarity Markings are unique from company to company. Here are samples of the most popular shapes.
The size, rotation and location of the Polarity Markings are user definable. Here are some recommendations.
The most popular polarity marking is a filled Dot. The size of the Polarity Marking is relevant to the size of the component package and pad width. However, the polarity dot size is also dependent on the part placement density and the assembly shops ability to easily locate the dot to avoid component rotation insertion errors. The smallest visible markings range from 0.25 mm – 0.40 mm and are typically used for micro miniature packages or very dense part placement PCB layouts. The average size ranges are 0.50 mm – 0.80 mm. The largest recommended polarity dot is 1.00 mm.
This illustration indicates 3 popular locations for a 0.50 mm dot on an SOP package. The preferred polarity dot placement is at the end of the pad which is the furthest distance from the component package body. This makes the post assembly inspection process easy as the component package may move up ordown during assembly reflow but the dot will always be visible. The acceptable location is the pad center but this location is also a potential via site. It is advisable to keep legend ink off non tented vias or tented via holes. The not recommended location has a higher potential of a via site and the marking could collide with other parts during the part placement process.
https://twitter.com/pcblibraries |
© 2014 2019 PCB Libraries, Inc. |
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
http://www.PCBLibraries.com/forum |
updated 10 21 18 |
Library Expert Surface Mount Families
Gull Wing Terminal Lead Legend Polarity Marking Location
The component body outline legend line width should be a minimum of 0.125 mm. The Polarity Marking Symbol and component body legend should have a minimum 0.075 mm gap from the solder mask. The figure below illustrates the anatomy of a land pattern and feature sizes and spaces.
Sample 0.50 mm Pitch SOP Legend and Polarity Marking Rules
https://twitter.com/pcblibraries |
© 2014 2019 PCB Libraries, Inc. |
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
http://www.PCBLibraries.com/forum |
updated 10 21 18 |
Library Expert Surface Mount Families
Warning, check with your PCB manufacturer to verify if they can meet the dimensional requirements.
Bottom only termination packages – BGA, LGA, CGA, QFN, PQFN, SON, PSON and DFN
The polarity marking size should match the Terminal Width. The gap between the body legend and the polarity marker should range from 0.15 mm – 0.25 mm
Polarized chip capacitors packages.
https://twitter.com/pcblibraries |
© 2014 2019 PCB Libraries, Inc. |
https://www.linkedin.com/company/3196824 |
Get updates at www.PCBLibraries.com/downloads |
http://www.PCBLibraries.com/forum |
updated 10 21 18 |