3-й семестр / Организация ЭВМиС; Орлов С.А., Цилькер Б.Я
..pdfСписок литературы |
671 |
|
|
134. Shen, J. P., Lipasti, M. H., Modern Processor Design: Fundamentals of Superscalar Processors , Tata McGraw-Hill Publishing Company, 2005.
135. Shiva, S. G., Computer Organization, Design, and Architecture, 4th edition, CRC Press, 2007.
136. Sima, D., Fountain, T., Kacsuk, P., Advanced Computer Architectures — a Design Space Approach, Addison-Wesley, 1997, 766 pp.
137. Skillicorn, D. A., Taxonomy for Computer Architectures, Computer, Vol. 21, № 11, 1988, pp. 46–57.
138. Smith, J., A Study of Branch Prediction Strategies, ISCA, Proceedings of the 8th Annual International Symposium on Computer Architecture (selected papers), May 1981.
139. Smith, A., Cache Memories, ACM Computing Surveys, Sep. 1982.
140. Smith, A., Line (Block) Size Choice for CPU Cache Memories, IEEE Transactions on Communications, Sep. 1987.
141. Smith, J. E., A Study of Branch Prediction Strategies, ISCA, ACM, 25 Years of the International Symposium on Computer Architecture (selected papers), Aug. 1998.
142. Snelling, D. F., The Design and Analysis of a Stateless Data-Flow Architectures, Technical Report UMCS-93-7-2, University of Manchester, Department of Computer Science, 1993.
143. Stallings, W., Computer Organization and Architecture, 8th Edition, Prentice-Hall, 2009. 144. Stoy, J. E., Denotational Semantics, MIT Press, 1981.
145. Stone, H. S., Parallel Processing with the Perfect Shuffle, IEEE Transactions on Computers, C-20, № 2, 1971, pp. 153–161.
146. Sun, X. H., Ni, L. M., Another view on parallel speedup, NY. Proc. of Conference on High Performance Networking and Computing, 1990, pp. 324–333.
147. Sun, X. H., Ni, L. M., Scalable Problems and Memory-Bounded Speedup, Journal of Parallel and Distributed Computing, № 19, 1993, pp. 27–37.
148. Takahashi, N., Amamija, M., A Data Flow Processor Array System: Design and Analysis, Proceedings 10th ISCA, Jun. 1983, pp. 243–250.
149. Talcott, A. R., Yamamoto, W., Serrano, M. J., Wood, R. C., Nemirovsky, V., The Impact of Unresolved Branches on Branch Prediction Scheme Performance, ACM SIGARCH Computer Architecture News, Proceedings of the 21st Annual International Symposium on Computer Architecture, Vol. 24, issue 2, Apr. 1994, pp. 12–21.
150. Tamic, Y., Sequin, C., Strategies for Managing the Register File in RISC, IEEE Transactions on Computers, Nov. 1983.
151. Tanenbaum, A., Implications of Structured Programming for Machine Architecture, Communications of the ACM, Mar. 1978.
152. Tanenbaum, A., Structured Computer Organization, 5th edition, Prentice-Hall International, 2006.
153. Tarnoff, D., Computer Organization and Design Fundamentals, e-Book, David Tarnoff, 2007, 432 pp.
154. Taylor, F. J., Ma, G-K., Multiplier policies for digital signal processing, IEEE ASSP Magazine, vol. 7, Jan. 1990, pp. 6–20.
155. Thacker, C. P., Stewart, L. C., Satterthwaite, E. H., Firefly: A Multiprocessor Workstation, IEEE Transactions on Computers, Vol. 37, № 8, Aug. 1988, pp. 909–920.
156. Thurber, K. J., Large Scale Computer Architecture, Hayden Book Company, Rochelle Park, New Jersey, 1976.
672 |
Список литературы |
|
|
157. Tocher, K. D., Techniques of Multiplication and Division for Automatic Binary Computers, Quart. J. Mech. Appl. Math., 11, Jul./Sep. 1958, pp. 364–384.
158. Tomasevic, M., Milutinovic, V., The Cache Coherence Problem in Shared-Memory Multiprocessors, IEEE Computer Society Press, Los Alamitos, CA. 1993.
159. Treleaven, P. C., Brownbridge, D. R., Hopkins, R. P., Data-Driven and Demand-Driven Computer Architecture, ACM Computing Surveys, 14 (1), Mar. 1982.
160. Vedder, R., Campbell, M., Tucker, G., The Hudges Data Flow Multiprocessor, Proceedings of the 5th International Conference on Distributed Computing Systems, May 1985, pp. 324–332.
161. Von Neumann, J., First Draft of a Report on the EDVAC, Moore School, University of Pennsylvania, 1945.
162. Whitney, S., et al., The SGI Origin Software Environment and Application Performance, Proceedings COMPCON Spring ’97, Feb. 1997.
163. Wilkes, M., The Best Way to Design an Automatic Calculating Machine, Proceedings Manchester University Computer Inaugural Conference, Jul. 1951.
164. Wilkinson, B., Computer Architecture: Design and Performance, New York: Prentice-Hall, 1996.
165. Williams, R., Computer Systems Architecture: A Networking Approach, 2nd edition, Prentice-Hall International, 2006.
166. Xie, J., Guo, B., An Evaluation and Comparative Analysis of Branch Prediction Schemes on Alpha Processors, Duke University, Department of Computer Science, Dec. 5, 2000.
167. Yeh, T., Patt, Y. N., Alternative Implementation of Two-Level Adaptive Branch Prediction, Proceedings of the International Symposium on Computer Architecture, 1992, pp. 124– 134.
168. Yeh, T., Patt, Y. N., Comparison of Dynamic Branch Predictors that use Two Levels of Branch History, Proceedings of the International Symposium on Computer Architecture, 1993, pp. 257–265.
169. Young, C., Gloy, N., Smith, N., A Comparative Analysis of Schemes for Correlated Branch Prediction, Proceedings of the International Symposium on Computer Architecture, 1995, pp. 287–295.
170. Zhou, M., Su, Z., A Comparative Analysis of Branch Prediction Schemes, Technical Report, University of California, Berkeley, 1995.
171. Zomaya, Y., Parallel and Distributed Computing HandBook, McGraw, 1997.