General-Purpose Input/Outputs (GPIOs)

9General-Purpose Input/Outputs (GPIOs)

TheGPIOmoduleiscomposedofsevenphysicalGPIOblocks,eachcorrespondingtoanindividual GPIO port (Port A, Port B, Port C, Port D, Port E, Port F, Port G). The GPIO module supports 0-42 programmable input/output pins, depending on the peripherals being used.

The GPIO module has the following features:

■0-42 GPIOs, depending on configuration

■5-V-tolerant input/outputs

■Programmable control for GPIO interrupts

–Interrupt generation masking

–Edge-triggered on rising, falling, or both

–Level-sensitive on High or Low values

■Bit masking in both read and write operations through address lines

■Can initiate an ADC sample sequence

■Pins configured as digital inputs are Schmitt-triggered.

■Programmable control for GPIO pad configuration

–Weak pull-up or pull-down resistors

–2-mA,4-mA,and8-mApaddrivefordigitalcommunication;uptofourpadscanbeconfigured with an 18-mA pad drive for high-current applications

–Slew rate control for the 8-mA drive

–Open drain enables

–Digital input enables

9.1Functional Description

Important: All GPIO pins are tri-stated by default (GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0, and GPIOPUR=0), with the exception of the five JTAG/SWD pins (PB7 and PC[3:0]). The JTAG/SWD pins default to their JTAG/SWD functionality (GPIOAFSEL=1, GPIODEN=1 and GPIOPUR=1). A Power-On-Reset (POR) or asserting RST puts both groups of pins back to their default state.

Each GPIO port is a separate hardware instantiation of the same physical block (see Figure 9-1 on page 177). The LM3S6965 microcontroller contains seven ports and thus seven of these physical GPIO blocks.

Preliminary