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LM3S6965 Microcontroller

Register 14: Flash Memory Protection Read Enable 2 (FMPRE2), offset 0x208

Note: Offset is relative to System Control base address of 0x400FE000.

This register stores the read-only protection bits for each 2-KB flash block (FMPPEn stores the execute-only bits). This register is loaded during the power-on reset sequence. The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. This achieves a policy of open access and programmability. The register bits may be changed by writing the specific register bit. However, this register is R/W0; the user can only change the protection bit from a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it may be restored by executing a power-on reset sequence. For additional information, see the "Flash Memory Protection" section.

Flash Memory Protection Read Enable 2 (FMPRE2)

Base 0x400F.E000

Offset 0x208

Type R/W, reset 0xFFFF.FFFF

 

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

READ_ENABLE

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

 

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

READ_ENABLE

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

Bit/Field

Name

Type

Reset

Description

 

31:0

READ_ENABLE

R/W

0xFFFFFFFF

Flash Read Enable

 

 

 

 

Enables 2-KB flash blocks to be executed or read. The policies may be

 

 

 

 

combinedasshowninthetable“FlashProtectionPolicyCombinations”.

 

 

 

 

Value

Description

 

 

 

 

0xFFFFFFFF Enables 256 KB of flash.

November 16, 2008

171

Preliminary

Internal Memory

Register 15: Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C

Note: Offset is relative to System Control base address of 0x400FE000.

This register stores the read-only protection bits for each 2-KB flash block (FMPPEn stores the execute-only bits). This register is loaded during the power-on reset sequence. The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. This achieves a policy of open access and programmability. The register bits may be changed by writing the specific register bit. However, this register is R/W0; the user can only change the protection bit from a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it may be restored by executing a power-on reset sequence. For additional information, see the "Flash Memory Protection" section.

Flash Memory Protection Read Enable 3 (FMPRE3)

Base 0x400F.E000

Offset 0x20C

Type R/W, reset 0xFFFF.FFFF

 

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

READ_ENABLE

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

 

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

READ_ENABLE

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

Bit/Field

Name

Type

Reset

Description

 

31:0

READ_ENABLE

R/W

0xFFFFFFFF

Flash Read Enable

 

 

 

 

Enables 2-KB flash blocks to be executed or read. The policies may be

 

 

 

 

combinedasshowninthetable“FlashProtectionPolicyCombinations”.

 

 

 

 

Value

Description

 

 

 

 

0xFFFFFFFF Enables 256 KB of flash.

172

November 16, 2008

Preliminary

LM3S6965 Microcontroller

Register 16: Flash Memory Protection Program Enable 1 (FMPPE1), offset 0x404

Note: Offset is relative to System Control base address of 0x400FE000.

This register stores the execute-only protection bits for each 2-KB flash block (FMPREn stores the execute-only bits). This register is loaded during the power-on reset sequence. The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. This achieves a policy of open access and programmability. The register bits may be changed by writing the specific register bit. However, this register is R/W0; the user can only change the protection bit from a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it may be restored by executing a power-on reset sequence. For additional information, see the "Flash Memory Protection" section.

Flash Memory Protection Program Enable 1 (FMPPE1)

Base 0x400F.E000

Offset 0x404

Type R/W, reset 0xFFFF.FFFF

 

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

PROG_ENABLE

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

 

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

PROG_ENABLE

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

Bit/Field

Name

Type

Reset

Description

 

31:0

PROG_ENABLE

R/W

0xFFFFFFFF

Flash Programming Enable

 

 

 

 

Configures 2-KB flash blocks to be execute only. The policies may be

 

 

 

 

combinedasshowninthetable“FlashProtectionPolicyCombinations”.

 

 

 

 

Value

Description

 

 

 

 

0xFFFFFFFF Enables 256 KB of flash.

November 16, 2008

173

Preliminary

Internal Memory

Register 17: Flash Memory Protection Program Enable 2 (FMPPE2), offset 0x408

Note: Offset is relative to System Control base address of 0x400FE000.

This register stores the execute-only protection bits for each 2-KB flash block (FMPREn stores the execute-only bits). This register is loaded during the power-on reset sequence. The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. This achieves a policy of open access and programmability. The register bits may be changed by writing the specific register bit. However, this register is R/W0; the user can only change the protection bit from a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it may be restored by executing a power-on reset sequence. For additional information, see the "Flash Memory Protection" section.

Flash Memory Protection Program Enable 2 (FMPPE2)

Base 0x400F.E000

Offset 0x408

Type R/W, reset 0xFFFF.FFFF

 

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

PROG_ENABLE

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

 

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

PROG_ENABLE

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

Bit/Field

Name

Type

Reset

Description

 

31:0

PROG_ENABLE

R/W

0xFFFFFFFF

Flash Programming Enable

 

 

 

 

Configures 2-KB flash blocks to be execute only. The policies may be

 

 

 

 

combinedasshowninthetable“FlashProtectionPolicyCombinations”.

 

 

 

 

Value

Description

 

 

 

 

0xFFFFFFFF Enables 256 KB of flash.

174

November 16, 2008

Preliminary

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