LM3S6965 Microcontroller

in the FMC register to activate a write operation. For the USER_DBG register, the data to be written must be loaded into the FMD register before it is "committed". All other registers are R/W and can have their operation tried before committing them to nonvolatile memory.

Important: These registers can only have bits changed from 1 to 0 by user programming, but can be restored to their factory default values by performing the sequence described in the sectioncalled“Recoveringa"Locked"Device”onpage60. Themasseraseofthemain flash array caused by the sequence is performed prior to restoring these registers.

In addition, the USER_REG0, USER_REG1, and USER_DBG use bit 31 (NW) of their respective registers to indicate that they are available for user write. These three registers can only be written once whereas the flash protection registers may be written multiple times. Table 8-2 on page 155 provides the FMA address required for commitment of each of the registers and the source of the data to be written when the COMT bit of the FMC register is written with a value of 0xA442.0008.

After writing the COMT bit, the user may poll the FMC register to wait for the commit operation to complete.

Table 8-2. Flash Resident Registersa

a. Which FMPREn and FMPPEn registers are available depend on the flash size of your particular Stellaris® device.

8.4Register Map

Table8-3onpage155liststheFlashmemoryandcontrolregisters. Theoffsetlistedisahexadecimal increment to the register's address. The FMA, FMD, FMC, FCRIS, FCIM, and FCMISC registers are relative to the Flash control base address of 0x400F.D000. The FMPREn, FMPPEn, USECRL, USER_DBG, and USER_REGn registers are relative to the System Control base address of 0x400F.E000.

Table 8-3. Flash Register Map

Preliminary