LM3S6965 Microcontroller

7.2.8Interrupts and Status

The Hibernation module can generate interrupts when the following conditions occur:

■Assertion of WAKE pin

■RTC match

■Low battery detected

All of the interrupts are ORed together before being sent to the interrupt controller, so the Hibernate modulecanonlygenerateasingleinterruptrequesttothecontrolleratanygiventime. Thesoftware interrupt handler can service multiple interrupt events by reading the HIBMIS register. Software can also read the status of the Hibernation module at any time by reading the HIBRIS register which shows all of the pending events. This register can be used at power-on to see if a wake condition is pending, which indicates to the software that a hibernation wake occurred.

The events that can trigger an interrupt are configured by setting the appropriate bits in the HIBIM register. Pending interrupts can be cleared by writing the corresponding bit in the HIBIC register.

7.3Initialization and Configuration

The Hibernation module can be set in several different configurations. The following sections show therecommendedprogrammingsequenceforvariousscenarios. Theexamplesbelowassumethat a 32.768-kHz oscillator is used, and thus always show bit 2 (CLKSEL) of the HIBCTL register set to 1. If a 4.194304-MHz crystal is used instead, then the CLKSEL bit remains cleared. Because the Hibernation module runs at 32.768 kHz and is asynchronous to the rest of the system, software

must allow a delay of tHIB_REG_WRITE after writes to certain registers (see “Register Access Timing”onpage133). Theregistersthatrequireadelayarelistedinanotein“RegisterMap”onpage

138 as well as in each register description.

7.3.1Initialization

The Hibernation module clock source must be enabled first, even if the RTC feature is not used. If a 4.194304-MHz crystal is used, perform the following steps:

1.Write0x40totheHIBCTL registeratoffset0x10toenablethecrystalandselectthedivide-by-128 input path.

2.Wait for a time of tXOSC_SETTLE for the crystal to power up and stabilize before performing any other operations with the Hibernation module.

If a 32.678-kHz oscillator is used, then perform the following steps:

1.Write 0x44 to the HIBCTL register at offset 0x10 to enable the oscillator input.

2.No delay is necessary.

The above is only necessary when the entire system is initialized for the first time. If the processor ispoweredduetoawakefromhibernation,thentheHibernationmodulehasalreadybeenpowered up and the above steps are not necessary. The software can detect that the Hibernation module and clock are already powered by examining the CLK32EN bit of the HIBCTL register.

7.3.2RTC Match Functionality (No Hibernation)

Use the following steps to implement the RTC match functionality of the Hibernation module:

Preliminary